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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-04 22:17:37 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-10 00:08:04 +0100
commitb6e9021b162ebe73d67a4d75c3e304fb2727860d (patch)
tree59fe9b0f783d868220bbda68c8dc060f28eec3ca /src/southbridge/intel/i82801ix
parent029cebc7cd0584ec517cbf38c51e0c35b52d023b (diff)
downloadcoreboot-b6e9021b162ebe73d67a4d75c3e304fb2727860d.tar.xz
intel 82801dx/gx/ix: Commit SMM relocation code to DRAM
Make sure relocation code reaches DRAM before issuing any SMIs. Snooping and cache coherency may have undefined behaviour as CPUs do not have uniform MTRR layout yet. Change-Id: I47a7d684e05ff8c1c2f1f6a5bf8c0bbc561d9eac Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17712 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/i82801ix')
-rw-r--r--src/southbridge/intel/i82801ix/smi.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801ix/smi.c b/src/southbridge/intel/i82801ix/smi.c
index dd0915a90f..358a1a9ee7 100644
--- a/src/southbridge/intel/i82801ix/smi.c
+++ b/src/southbridge/intel/i82801ix/smi.c
@@ -256,6 +256,7 @@ static void smm_relocate(void)
/* copy the SMM relocation code */
memcpy((void *)0x38000, &smm_relocation_start,
&smm_relocation_end - &smm_relocation_start);
+ wbinvd();
printk(BIOS_DEBUG, "\n");
dump_smi_status(reset_smi_status());