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authorElyes HAOUAS <ehaouas@noos.fr>2016-08-31 19:22:16 +0200
committerMartin Roth <martinroth@google.com>2016-08-31 20:22:46 +0200
commitba28e8d73b143def8dfe7c0dc7cfcbce83c601a1 (patch)
tree9f7e4416b63e26ee3f4df6f9a61ab55f377bcb5f /src/southbridge/intel/i82801ix
parent2e4d80687dd79890c7c9edad8dbaf6e89edf2afc (diff)
downloadcoreboot-ba28e8d73b143def8dfe7c0dc7cfcbce83c601a1.tar.xz
src/southbridge: Code formating
Change-Id: Icfc35b73bacb60b1f21e71e70ad4418ec3e644f6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16291 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel/i82801ix')
-rw-r--r--src/southbridge/intel/i82801ix/bootblock.c16
-rw-r--r--src/southbridge/intel/i82801ix/hdaudio.c4
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c2
-rw-r--r--src/southbridge/intel/i82801ix/smihandler.c2
4 files changed, 12 insertions, 12 deletions
diff --git a/src/southbridge/intel/i82801ix/bootblock.c b/src/southbridge/intel/i82801ix/bootblock.c
index e2223686ba..6252712eba 100644
--- a/src/southbridge/intel/i82801ix/bootblock.c
+++ b/src/southbridge/intel/i82801ix/bootblock.c
@@ -17,18 +17,18 @@
static void enable_spi_prefetch(void)
{
- u8 reg8;
- pci_devfn_t dev;
+ u8 reg8;
+ pci_devfn_t dev;
- dev = PCI_DEV(0, 0x1f, 0);
+ dev = PCI_DEV(0, 0x1f, 0);
- reg8 = pci_read_config8(dev, 0xdc);
- reg8 &= ~(3 << 2);
- reg8 |= (2 << 2); /* Prefetching and Caching Enabled */
- pci_write_config8(dev, 0xdc, reg8);
+ reg8 = pci_read_config8(dev, 0xdc);
+ reg8 &= ~(3 << 2);
+ reg8 |= (2 << 2); /* Prefetching and Caching Enabled */
+ pci_write_config8(dev, 0xdc, reg8);
}
static void bootblock_southbridge_init(void)
{
- enable_spi_prefetch();
+ enable_spi_prefetch();
}
diff --git a/src/southbridge/intel/i82801ix/hdaudio.c b/src/southbridge/intel/i82801ix/hdaudio.c
index 4848b948b8..c3602c40b0 100644
--- a/src/southbridge/intel/i82801ix/hdaudio.c
+++ b/src/southbridge/intel/i82801ix/hdaudio.c
@@ -118,7 +118,7 @@ static int wait_for_ready(u8 *base)
int timeout = 50;
- while(timeout--) {
+ while (timeout--) {
u32 reg32 = read32(base + HDA_ICII_REG);
if (!(reg32 & HDA_ICII_BUSY))
return 0;
@@ -147,7 +147,7 @@ static int wait_for_valid(u8 *base)
* same duration */
int timeout = 50;
- while(timeout--) {
+ while (timeout--) {
reg32 = read32(base + HDA_ICII_REG);
if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) ==
HDA_ICII_VALID)
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index 4415f44154..e095ad8622 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -110,7 +110,7 @@ static void i82801ix_pirq_init(device_t dev)
* I am not so sure anymore he was right.
*/
- for(irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) {
+ for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) {
u8 int_pin=0, int_line=0;
if (!irq_dev->enabled || irq_dev->path.type != DEVICE_PATH_PCI)
diff --git a/src/southbridge/intel/i82801ix/smihandler.c b/src/southbridge/intel/i82801ix/smihandler.c
index 5f1a44f5b9..7ad00ed5ba 100644
--- a/src/southbridge/intel/i82801ix/smihandler.c
+++ b/src/southbridge/intel/i82801ix/smihandler.c
@@ -518,7 +518,7 @@ void southbridge_smi_handler(unsigned int node, smm_state_save_area_t *state_sav
}
}
- if(dump) {
+ if (dump) {
dump_smi_status(smi_sts);
}