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| author | Martin Roth <martinroth@google.com> | 2017-06-24 21:29:38 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-16 19:22:18 +0000 |
| commit | 7a1a3ad2ce3403f0379b72d30360e2bed02e9c26 (patch) | |
| tree | 0db32f6a8f2349b5ce269996f3246b13fec9d5af /src/southbridge/intel/i82801ix | |
| parent | 9fa8ebe1a41fab33badfa4745708e1ad237e8a34 (diff) | |
| download | coreboot-7a1a3ad2ce3403f0379b72d30360e2bed02e9c26.tar.xz | |
southbridge/intel: add IS_ENABLED() around Kconfig symbol references
Change-Id: I2b532522938123bb7844cef94cda0b44bcb98e45
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20350
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/intel/i82801ix')
| -rw-r--r-- | src/southbridge/intel/i82801ix/acpi/sleepstates.asl | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801ix/i82801ix.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801ix/lpc.c | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82801ix/acpi/sleepstates.asl b/src/southbridge/intel/i82801ix/acpi/sleepstates.asl index 62bb0264de..d7fb2a56bb 100644 --- a/src/southbridge/intel/i82801ix/acpi/sleepstates.asl +++ b/src/southbridge/intel/i82801ix/acpi/sleepstates.asl @@ -15,7 +15,7 @@ */ Name(\_S0, Package(){0x0,0x0,0x0,0x0}) -#if !CONFIG_HAVE_ACPI_RESUME +#if !IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) Name(\_S1, Package(){0x1,0x0,0x0,0x0}) #else Name(\_S3, Package(){0x5,0x0,0x0,0x0}) diff --git a/src/southbridge/intel/i82801ix/i82801ix.c b/src/southbridge/intel/i82801ix/i82801ix.c index 0f3a08c9cf..7d44fba88b 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.c +++ b/src/southbridge/intel/i82801ix/i82801ix.c @@ -222,7 +222,7 @@ static void i82801ix_init(void *chip_info) i82801ix_hide_functions(); /* Reset watchdog timer. */ -#if !CONFIG_HAVE_SMI_HANDLER +#if !IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) outw(0x0008, DEFAULT_TCOBASE + 0x12); /* Set higher timer value. */ #endif outw(0x0000, DEFAULT_TCOBASE + 0x00); /* Update timer. */ diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 8212b0a092..bc45b9ddc1 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -369,7 +369,7 @@ static void enable_clock_gating(void) RCBA32(0x38c0) |= 7; } -#if CONFIG_HAVE_SMI_HANDLER +#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) static void i82801ix_lock_smm(struct device *dev) { #if TEST_SMM_FLASH_LOCKDOWN @@ -464,7 +464,7 @@ static void lpc_init(struct device *dev) /* Interrupt 9 should be level triggered (SCI) */ i8259_configure_irq_trigger(9, 1); -#if CONFIG_HAVE_SMI_HANDLER +#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) i82801ix_lock_smm(dev); #endif } |