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authorArthur Heymans <arthur@aheymans.xyz>2018-04-10 13:18:19 +0200
committerArthur Heymans <arthur@aheymans.xyz>2018-12-03 10:16:31 +0000
commit6af3e6f4ff2ff727fec3034ef64c6dd604d44c9c (patch)
treeb7608d73d142b141892ad7c24c60f234fb2be0e3 /src/southbridge/intel/i82801jx/Kconfig
parent009518e79b9b3a7d756243dd6ca1b6789de1430a (diff)
downloadcoreboot-6af3e6f4ff2ff727fec3034ef64c6dd604d44c9c.tar.xz
sb/intel/i82801jx: Use common Intel SMM code
Use the common Intel code to set up smm and the smihandler. This is expected to break S3 resume and other smihandler related functionality as this code is meant to be used with CONFIG_SMM_TSEG. The platform (x4x) using this southbridge will adapt the CONFIG_SMM_TSEG codepath in subsequent patches. Change-Id: Id3b3b3abbb3920d68d77fd7db996a1dc3c6b85a3 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/25596 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801jx/Kconfig')
-rw-r--r--src/southbridge/intel/i82801jx/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig
index 4308e29510..b215812601 100644
--- a/src/southbridge/intel/i82801jx/Kconfig
+++ b/src/southbridge/intel/i82801jx/Kconfig
@@ -28,6 +28,7 @@ config SOUTHBRIDGE_INTEL_I82801JX
select SOUTHBRIDGE_INTEL_COMMON_GPIO
select INTEL_DESCRIPTOR_MODE_CAPABLE
select COMMON_FADT
+ select SOUTHBRIDGE_INTEL_COMMON_SMM
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
if SOUTHBRIDGE_INTEL_I82801JX