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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-04-12 00:15:39 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-24 15:09:27 +0000 |
| commit | ad5014952b9c84bb3668ce3f21094a06b798499f (patch) | |
| tree | 883c18279c459351219fbdf0bb01cf2a264f4162 /src/southbridge/intel/i82801jx/chip.h | |
| parent | b4560cd523867b9171db835b3df151ed18a209dc (diff) | |
| download | coreboot-ad5014952b9c84bb3668ce3f21094a06b798499f.tar.xz | |
sb/intel/i82801jx: Generate default fadt and madt
Function copied from i82801gx with offsets fixed for i82801lx.
Change-Id: Ib420c69470c3190cc1eac234ce68a18382fbc04a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19253
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801jx/chip.h')
| -rw-r--r-- | src/southbridge/intel/i82801jx/chip.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h index f22748bc05..95d0d75cc1 100644 --- a/src/southbridge/intel/i82801jx/chip.h +++ b/src/southbridge/intel/i82801jx/chip.h @@ -73,6 +73,9 @@ struct southbridge_intel_i82801jx_config { int c4onc3_enable:1; int c5_enable : 1; int c6_enable : 1; + int c3_latency; + int p_cnt_throttling_supported:1; + int docking_supported:1; int throttle_duty : 3; |