summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/i82801jx
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-23 07:23:40 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-06-06 09:24:11 +0000
commitc328a680def0f589536c24ff547465bd7eb3546d (patch)
treefa81f3b8f83b9fd408435d2b085b40d8655d68a0 /src/southbridge/intel/i82801jx
parent2e270ae2974463c86711b400a7abcb36d1b2e67d (diff)
downloadcoreboot-c328a680def0f589536c24ff547465bd7eb3546d.tar.xz
soc,southbridge/intel: Control SMI related FADT entries
When no SMI is installed, FADT should not advertise a trigger mechanism that does not respond. Change-Id: Ifb4f99c11a72e75ec20b9faaf62aed5546de91fa Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41909 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801jx')
-rw-r--r--src/southbridge/intel/i82801jx/lpc.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index ae98fddc2a..b3aeda22f7 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -532,13 +532,15 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->reserved = 0;
fadt->sci_int = 0x9;
- fadt->smi_cmd = APM_CNT;
- fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
- fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
- fadt->s4bios_req = 0x0;
- fadt->pstate_cnt = APM_CNT_PST_CONTROL;
- fadt->cst_cnt = APM_CNT_CST_CONTROL;
+ if (CONFIG(HAVE_SMI_HANDLER)) {
+ fadt->smi_cmd = APM_CNT;
+ fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
+ fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
+ fadt->cst_cnt = APM_CNT_CST_CONTROL;
+ fadt->pstate_cnt = APM_CNT_PST_CONTROL;
+ }
+
fadt->p_lvl2_lat = 1;
fadt->p_lvl3_lat = chip->c3_latency;
fadt->flush_size = 0;