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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2018-11-30 00:06:51 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-05 13:36:26 +0000
commit042772a6bd66cd09add08da40785406e34e92d0a (patch)
treec3997c7d1acee6ddb9bf526ab0ef649527b71141 /src/southbridge/intel/i82801jx
parent0688ab8d95f18f718510cc17aeb01a47519a9a5a (diff)
downloadcoreboot-042772a6bd66cd09add08da40785406e34e92d0a.tar.xz
mb/emulation/spike-riscv: Implement mtime_init
This patch lets spike boot to "Payload not loaded" again. Because soc/ucb/riscv/ does not represent a real SoC, but is a dummy directory for emulators, and different emulators might have different memory maps, I moved mtime_init to the mainboard-specific directories for Spike and QEMU. Change-Id: I080f7f81df752e25478bd277637bf894bbee4cb2 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/28873 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Hug <philipp@hug.cx>
Diffstat (limited to 'src/southbridge/intel/i82801jx')
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