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authorArthur Heymans <arthur@aheymans.xyz>2018-06-13 00:07:09 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-06-21 15:51:48 +0000
commit2e464cf3b0a475bde87babb27361342708bd00a0 (patch)
tree0bcc66c23c6773734129be88ef860c6b56a73c77 /src/southbridge/intel/i82801jx
parent8d0e88db34276d93cfbc96e1e25c571f6e49f9f8 (diff)
downloadcoreboot-2e464cf3b0a475bde87babb27361342708bd00a0.tar.xz
sb/intel/i82801xx: Use common RCBA MACROs
Change-Id: I61fb3b01ff15ba2da2ee938addfa630c282c9870 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/27043 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801jx')
-rw-r--r--src/southbridge/intel/i82801jx/i82801jx.h11
1 files changed, 2 insertions, 9 deletions
diff --git a/src/southbridge/intel/i82801jx/i82801jx.h b/src/southbridge/intel/i82801jx/i82801jx.h
index 88e0ad01f3..5aa41dd6c6 100644
--- a/src/southbridge/intel/i82801jx/i82801jx.h
+++ b/src/southbridge/intel/i82801jx/i82801jx.h
@@ -25,11 +25,8 @@
#endif
#define DEFAULT_TBAR ((u8 *)0xfed1b000)
-#ifndef __ACPI__
-#define DEFAULT_RCBA ((u8 *)0xfed1c000)
-#else
-#define DEFAULT_RCBA 0xfed1c000
-#endif
+
+#include <southbridge/intel/common/rcba.h>
#define DEFAULT_PMBASE 0x00000500
#define DEFAULT_TCOBASE (DEFAULT_PMBASE + 0x60)
@@ -147,10 +144,6 @@
#define SMB_SMI_EN (1 << 1)
#define HST_EN (1 << 0)
-#define RCBA8(x) *((volatile u8 *)(DEFAULT_RCBA + x))
-#define RCBA16(x) *((volatile u16 *)(DEFAULT_RCBA + x))
-#define RCBA32(x) *((volatile u32 *)(DEFAULT_RCBA + x))
-
#define RCBA_V0CTL 0x0014
#define RCBA_V1CAP 0x001c
#define RCBA_V1CTL 0x0020