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authorNico Huber <nico.h@gmx.de>2018-11-14 00:00:35 +0100
committerNico Huber <nico.h@gmx.de>2019-01-06 15:54:19 +0000
commit9faae2b939d0c83632baeefe80bef1739e125018 (patch)
treea3d62f5f14994f1facc2389d189796a836bd8e81 /src/southbridge/intel/i82801jx
parentd2f678d3bd6ca4c05fa5c652d6cdf4623543e576 (diff)
downloadcoreboot-9faae2b939d0c83632baeefe80bef1739e125018.tar.xz
Kconfig: Unify power-after-failure options
The newest and most useful incarnation was hiding in soc/intel/common/. We move it into the Mainboard menu and extend it with various flags to be selected to control the default and which options are visible. Also add a new `int` config MAINBOARD_POWER_FAILURE_STATE that moves the boolean to int conversion into Kconfig: 0 - S5 1 - S0 2 - previous state This patch focuses on the Kconfig code. The C code could be unified as well, e.g. starting with a common enum and safe wrapper around the get_option() call. TEST=Did what-jenkins-does with and without this commit and compared binaries. Nothing changed for the default configurations. Change-Id: I61259f864c8a8cfc7099cc2699059f972fa056c0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/29680 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge/intel/i82801jx')
-rw-r--r--src/southbridge/intel/i82801jx/Kconfig2
-rw-r--r--src/southbridge/intel/i82801jx/i82801jx.h5
-rw-r--r--src/southbridge/intel/i82801jx/lpc.c2
3 files changed, 3 insertions, 6 deletions
diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig
index b215812601..2bc18fa8fe 100644
--- a/src/southbridge/intel/i82801jx/Kconfig
+++ b/src/southbridge/intel/i82801jx/Kconfig
@@ -30,6 +30,8 @@ config SOUTHBRIDGE_INTEL_I82801JX
select COMMON_FADT
select SOUTHBRIDGE_INTEL_COMMON_SMM
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
+ select HAVE_POWER_STATE_AFTER_FAILURE
+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
if SOUTHBRIDGE_INTEL_I82801JX
diff --git a/src/southbridge/intel/i82801jx/i82801jx.h b/src/southbridge/intel/i82801jx/i82801jx.h
index 3c09746f81..4813dd83b3 100644
--- a/src/southbridge/intel/i82801jx/i82801jx.h
+++ b/src/southbridge/intel/i82801jx/i82801jx.h
@@ -76,11 +76,6 @@
#define MAINBOARD_POWER_ON 1
#define MAINBOARD_POWER_KEEP 2
-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
-#endif
-
-
/* D31:F0 LPC bridge */
#define D31F0_PMBASE 0x40
#define PMBASE D31F0_PMBASE
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index 2ff2acd095..0f82f90455 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -172,7 +172,7 @@ static void i82801jx_power_options(struct device *dev)
/* Get the chip configuration */
config_t *config = dev->chip_info;
- int pwr_on=CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
+ int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;
int nmi_option;
/* BIOS must program... */