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authorCorey Osgood <corey.osgood@gmail.com>2007-06-14 12:04:19 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2007-06-14 12:04:19 +0000
commitd9e56e9cd3f5b4b35917c010de60369285bb39da (patch)
tree3bb330535f9d097bd8a4d388edc17985044c6edf /src/southbridge/intel/i82801xx
parentc0eb5e08305ad6caa145631f9c67cf1b1a378b36 (diff)
downloadcoreboot-d9e56e9cd3f5b4b35917c010de60369285bb39da.tar.xz
Small bugfix in i82801xx_lpc.c.
Signed-off-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2721 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801xx')
-rw-r--r--src/southbridge/intel/i82801xx/i82801xx_lpc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801xx/i82801xx_lpc.c b/src/southbridge/intel/i82801xx/i82801xx_lpc.c
index 3f9044c87a..c0d783d9a9 100644
--- a/src/southbridge/intel/i82801xx/i82801xx_lpc.c
+++ b/src/southbridge/intel/i82801xx/i82801xx_lpc.c
@@ -89,8 +89,8 @@ void i82801xx_rtc_init(struct device *dev)
uint8_t reg8;
uint32_t reg32;
int rtc_failed;
- byte = pci_read_config8(dev, GEN_PMCON_3);
- rtc_failed = byte & RTC_BATTERY_DEAD;
+ reg8 = pci_read_config8(dev, GEN_PMCON_3);
+ rtc_failed = reg8 & RTC_BATTERY_DEAD;
if (rtc_failed) {
reg8 &= ~(1 << 1); /* preserve the power fail state */
pci_write_config8(dev, GEN_PMCON_3, reg8);