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| author | Angel Pons <th3fanbus@gmail.com> | 2019-09-18 10:58:53 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-19 09:39:24 +0000 |
| commit | 42b4e4e1ddde1298c9535f04e4dd99239ed77ac8 (patch) | |
| tree | c6115efd52dafe2faa06ae634ae73e1a6f2c4f05 /src/southbridge/intel/ibexpeak/lpc.c | |
| parent | b4eb02aa8b9e7c479e8cb104197afd326c36f974 (diff) | |
| download | coreboot-42b4e4e1ddde1298c9535f04e4dd99239ed77ac8.tar.xz | |
sb/intel/ibexpeak: Add define for PRSTS register
Change-Id: Ia9a6b0c7f2a07796f850acd2349067ba5e5eb735
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35453
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/ibexpeak/lpc.c')
| -rw-r--r-- | src/southbridge/intel/ibexpeak/lpc.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index a6bbe64160..3e1f4a4350 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -266,10 +266,11 @@ static void pch_power_options(struct device *dev) outl(reg32, pmbase + 0x04); /* Clear magic status bits to prevent unexpected wake */ - reg32 = RCBA32(0x3310); - reg32 |= (1 << 4)|(1 << 5)|(1 << 0); - RCBA32(0x3310) = reg32; + reg32 = RCBA32(PRSTS); + reg32 |= (1 << 5) | (1 << 4) | (1 << 0); + RCBA32(PRSTS) = reg32; + /* FIXME: Does this even exist? */ reg32 = RCBA32(0x3f02); reg32 &= ~0xf; RCBA32(0x3f02) = reg32; |