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| author | Patrick Rudolph <siro@das-labor.org> | 2019-11-29 19:27:37 +0100 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2020-09-26 17:31:08 +0000 |
| commit | 819c2067424fb49347b38fc2a45ab0ad74b93f31 (patch) | |
| tree | 799ecb49096c8fc8c4aa976208babd7401744d81 /src/southbridge/intel/ibexpeak/me.c | |
| parent | a32df26ec0759bbac2080f6d9a437320f5d61157 (diff) | |
| download | coreboot-819c2067424fb49347b38fc2a45ab0ad74b93f31.tar.xz | |
ironlake: Fix compilation on x86_64
Use correct datasize to compile on x86_64.
Tested on Lenovo T410 with additional x86_64 patches.
Change-Id: I213b2b1c5de174b5c14b67d1b437d19c656d13fd
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37371
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/intel/ibexpeak/me.c')
| -rw-r--r-- | src/southbridge/intel/ibexpeak/me.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c index 3477d8cfc2..b355d9dbdb 100644 --- a/src/southbridge/intel/ibexpeak/me.c +++ b/src/southbridge/intel/ibexpeak/me.c @@ -359,7 +359,7 @@ static void intel_me7_finalize_smm(void) u32 reg32; u16 reg16; - mei_base_address = (u32 *) + mei_base_address = (u32 *)(uintptr_t) (pci_read_config32(PCH_ME_DEV, PCI_BASE_ADDRESS_0) & ~0xf); /* S3 path will have hidden this device already */ |