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| author | Vladimir Serbinenko <phcoder@gmail.com> | 2013-06-07 01:55:57 +0200 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-06-12 05:29:07 +0200 |
| commit | fe50d0bcfe96210413d9c2372d3daa779892b520 (patch) | |
| tree | c45fd4e0f2b811a0f9d7a18ba919fa2ea52c8f97 /src/southbridge/intel/ibexpeak/nvs.h | |
| parent | 7d1ebbff5ad224591a2d1972737611f96a13145c (diff) | |
| download | coreboot-fe50d0bcfe96210413d9c2372d3daa779892b520.tar.xz | |
Make acpi/ec.c usable in romstage
On X201 to enable EHCI debug you need to go through EC if USB power is
disabled so we need to inclue ec.c.
Change-Id: I8f8b7de639ecaebceaa53cd338136befaeec8214
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/3405
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/ibexpeak/nvs.h')
0 files changed, 0 insertions, 0 deletions