diff options
| author | Patrick Rudolph <siro@das-labor.org> | 2016-02-06 18:12:28 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-02-23 00:28:26 +0100 |
| commit | 10104685c50d05353318932f183864f3fca37489 (patch) | |
| tree | 072dbb9e7ca8ccf32a78adb7827f7a4b8fdfb893 /src/southbridge/intel/ibexpeak/pch.h | |
| parent | 273a8dca1f7896c73b812ecc2c6cd2572ac51d6a (diff) | |
| download | coreboot-10104685c50d05353318932f183864f3fca37489.tar.xz | |
southbridge/intel/ibexpeak: Use common gpio.c
Use shared gpio code from common folder.
Remove the now unused bd82x6x/gpio.c.
Needs test on real hardware !
Change-Id: Ibb54c03fd83a529d1ceccfb2c33190e7d42224d8
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/13616
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/ibexpeak/pch.h')
| -rw-r--r-- | src/southbridge/intel/ibexpeak/pch.h | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/southbridge/intel/ibexpeak/pch.h b/src/southbridge/intel/ibexpeak/pch.h index 057214332d..07127fafbf 100644 --- a/src/southbridge/intel/ibexpeak/pch.h +++ b/src/southbridge/intel/ibexpeak/pch.h @@ -432,22 +432,6 @@ void southbridge_configure_default_intmap(void); #define PCH_DISABLE_MEI1 (1 << 1) #define PCH_ENABLE_DBDF (1 << 0) -/* ICH7 GPIOBASE */ -#define GPIO_USE_SEL 0x00 -#define GP_IO_SEL 0x04 -#define GP_LVL 0x0c -#define GPO_BLINK 0x18 -#define GPI_INV 0x2c -#define GPIO_USE_SEL2 0x30 -#define GP_IO_SEL2 0x34 -#define GP_LVL2 0x38 -#define GPIO_USE_SEL3 0x40 -#define GP_IO_SEL3 0x44 -#define GP_LVL3 0x48 -#define GP_RST_SEL1 0x60 -#define GP_RST_SEL2 0x64 -#define GP_RST_SEL3 0x68 - /* ICH7 PMBASE */ #define PM1_STS 0x00 #define WAK_STS (1 << 15) |