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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-17 23:37:49 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-30 09:19:10 +0000 |
| commit | 0c1dd9c84188cc150a05302cc9b4af476a761d2b (patch) | |
| tree | cf8249cc3ba689e903c64d926c162c1e1f742d78 /src/southbridge/intel/ibexpeak | |
| parent | bc1cb38ce15e059988263b04c0ea751ddf4b052d (diff) | |
| download | coreboot-0c1dd9c84188cc150a05302cc9b4af476a761d2b.tar.xz | |
ACPI: Drop typedef global_nvs_t
Bring all GNVS related initialisation function to global
scope to force identical signatures. Followup work is
likely to remove some as duplicates.
Change-Id: Id4299c41d79c228f3d35bc7cb9bf427ce1e82ba1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42489
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/ibexpeak')
| -rw-r--r-- | src/southbridge/intel/ibexpeak/lpc.c | 5 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/nvs.h | 10 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/smihandler.c | 6 |
3 files changed, 9 insertions, 12 deletions
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 36d46f209a..2c2904627e 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -13,6 +13,7 @@ #include <device/pci_ops.h> #include <arch/ioapic.h> #include <acpi/acpi.h> +#include <acpi/acpi_gnvs.h> #include <elog.h> #include <acpi/acpigen.h> #include <cbmem.h> @@ -552,9 +553,9 @@ static void pch_lpc_enable(struct device *dev) pch_enable(dev); } -static void southbridge_inject_dsdt(const struct device *dev) +void southbridge_inject_dsdt(const struct device *dev) { - global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); + struct global_nvs *gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); if (gnvs) { memset(gnvs, 0, sizeof(*gnvs)); diff --git a/src/southbridge/intel/ibexpeak/nvs.h b/src/southbridge/intel/ibexpeak/nvs.h index 6b82de33b2..834b3af8a8 100644 --- a/src/southbridge/intel/ibexpeak/nvs.h +++ b/src/southbridge/intel/ibexpeak/nvs.h @@ -3,7 +3,7 @@ #include <commonlib/helpers.h> #include "vendorcode/google/chromeos/gnvs.h" -typedef struct global_nvs_t { +struct __packed global_nvs { /* Miscellaneous */ u16 osys; /* 0x00 - Operating System */ u8 smif; /* 0x02 - SMI function call ("TRAP") */ @@ -99,10 +99,6 @@ typedef struct global_nvs_t { /* ChromeOS specific (starts at 0x100)*/ chromeos_acpi_t chromeos; -} __packed global_nvs_t; -check_member(global_nvs_t, chromeos, GNVS_CHROMEOS_ACPI_OFFSET); +}; -/* Used in SMM to find the ACPI GNVS address */ -global_nvs_t *smm_get_gnvs(void); - -void acpi_create_gnvs(global_nvs_t *gnvs); +check_member(global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET); diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c index a881f33dab..2679351436 100644 --- a/src/southbridge/intel/ibexpeak/smihandler.c +++ b/src/southbridge/intel/ibexpeak/smihandler.c @@ -26,8 +26,8 @@ /* GNVS needs to be updated by an 0xEA PM Trap (B2) after it has been located * by coreboot. */ -static global_nvs_t *gnvs; -global_nvs_t *smm_get_gnvs(void) +static struct global_nvs *gnvs; +struct global_nvs *smm_get_gnvs(void) { return gnvs; } @@ -160,7 +160,7 @@ void southbridge_update_gnvs(u8 apm_cnt, int *smm_done) smi_apmc_find_state_save(apm_cnt); if (state) { /* EBX in the state save contains the GNVS pointer */ - gnvs = (global_nvs_t *)((u32)state->rbx); + gnvs = (struct global_nvs *)((u32)state->rbx); *smm_done = 1; printk(BIOS_DEBUG, "SMI#: Setting GNVS to %p\n", gnvs); } |