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authorArthur Heymans <arthur@aheymans.xyz>2019-11-16 10:04:41 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-18 07:08:35 +0000
commit3457df1730bf4446fa0e0042e43cc0c0e7bd1073 (patch)
tree1977e05f494ad6a4888722dfd8c4d35e81df344b /src/southbridge/intel/ibexpeak
parentdc2e7c6e0fb1331a7808c226992c71e07f9ca7bd (diff)
downloadcoreboot-3457df1730bf4446fa0e0042e43cc0c0e7bd1073.tar.xz
sb/intel/common: Properly guard USB debug
The declarations in usb_debug.c needs to be guarded in order to not conflict with other chipsets. Change-Id: I84c3401b9419f2878c2cfdf81147fa854018f9ae Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36878 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Mike Banon <mikebdp2@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/ibexpeak')
-rw-r--r--src/southbridge/intel/ibexpeak/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig
index c84a66d313..f9723fb2d8 100644
--- a/src/southbridge/intel/ibexpeak/Kconfig
+++ b/src/southbridge/intel/ibexpeak/Kconfig
@@ -22,7 +22,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select IOAPIC
- select HAVE_USBDEBUG
select HAVE_SMI_HANDLER
select USE_WATCHDOG_ON_BOOT
select PCIEXP_ASPM
@@ -45,6 +44,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select HAVE_POWER_STATE_AFTER_FAILURE
select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
+ select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
config EHCI_BAR
hex