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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-19 19:50:51 +0300 |
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committer | Patrick Georgi <patrick@georgi-clan.de> | 2014-06-21 08:04:52 +0200 |
commit | c3ed88636a3533b97cef5bcb445cbe61edbfae7f (patch) | |
tree | 12b51d3abb1876d41a8fd1b2bcf899e316b3d511 /src/southbridge/intel/ibexpeak | |
parent | 49380b87d114cf4c1bd6f0692f43e89e73f662b8 (diff) | |
download | coreboot-c3ed88636a3533b97cef5bcb445cbe61edbfae7f.tar.xz |
intel boards: Use acpi_is_wakeup_s3()
Change-Id: Icab0aeb2d5bf19b4029ca29b8a1e7564ef59a538
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6071
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/intel/ibexpeak')
-rw-r--r-- | src/southbridge/intel/ibexpeak/lpc.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/ibexpeak/me.c | 5 |
2 files changed, 2 insertions, 5 deletions
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index dca46014d3..ef9a632dde 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -438,7 +438,7 @@ static void pch_lock_smm(struct device *dev) u8 reg8; #endif - if (acpi_slp_type != 3) { + if (!acpi_is_wakeup_s3()) { #if ENABLE_ACPI_MODE_IN_COREBOOT printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n"); outb(0xe1, 0xb2); // Enable ACPI mode diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c index 0e1b5b8920..3130631a77 100644 --- a/src/southbridge/intel/ibexpeak/me.c +++ b/src/southbridge/intel/ibexpeak/me.c @@ -436,12 +436,9 @@ static me_bios_path intel_me_path(device_t dev) struct me_hfs hfs; struct me_gmes gmes; -#if CONFIG_HAVE_ACPI_RESUME /* S3 wake skips all MKHI messages */ - if (acpi_slp_type == 3) { + if (acpi_is_wakeup_s3()) return ME_S3WAKE_BIOS_PATH; - } -#endif pci_read_dword_ptr(dev, &hfs, PCI_ME_HFS); pci_read_dword_ptr(dev, &gmes, PCI_ME_GMES); |