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authorVladimir Serbinenko <phcoder@gmail.com>2014-10-28 23:43:20 +0100
committerVladimir Serbinenko <phcoder@gmail.com>2014-11-19 21:09:51 +0100
commit36fa5b80843d836518eb89f46747e80ed6b5d96f (patch)
treea36f498a48aaa8764df768ff3616ff476f62a07b /src/southbridge/intel/ibexpeak
parent10dd0e3171bc631fd5d83d4f42aa376edd3c6d55 (diff)
downloadcoreboot-36fa5b80843d836518eb89f46747e80ed6b5d96f.tar.xz
i82801ix,bd82x6x,ibexpeak: rewrite expresscard hotplug
This implementation is more compact, unified and works with windows as well. Tested under windows and under Debian GNU/Linux. Change-Id: I585dec12e17e22d829baa3f2dc7aecc174f9d3b5 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7296 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel/ibexpeak')
-rw-r--r--src/southbridge/intel/ibexpeak/Makefile.inc1
-rw-r--r--src/southbridge/intel/ibexpeak/lpc.c10
2 files changed, 11 insertions, 0 deletions
diff --git a/src/southbridge/intel/ibexpeak/Makefile.inc b/src/southbridge/intel/ibexpeak/Makefile.inc
index 24cbe454a1..2db758a056 100644
--- a/src/southbridge/intel/ibexpeak/Makefile.inc
+++ b/src/southbridge/intel/ibexpeak/Makefile.inc
@@ -33,6 +33,7 @@ ramstage-y += me.c
ramstage-y += ../bd82x6x/me_8.x.c
ramstage-y += smbus.c
ramstage-y += thermal.c
+ramstage-y += ../common/pciehp.c
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index c094ead557..03b40495e1 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -38,6 +38,7 @@
#include <cpu/x86/smm.h>
#include "pch.h"
#include "nvs.h"
+#include <southbridge/intel/common/pciehp.h>
#define NMI_OFF 0
@@ -821,6 +822,14 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->x_gpe1_blk.addrh = 0x0;
}
+static void southbridge_fill_ssdt(void)
+{
+ device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0));
+ config_t *chip = dev->chip_info;
+
+ intel_acpi_pcie_hotplug_generator(chip->pcie_hotplug_map, 8);
+}
+
static struct pci_operations pci_ops = {
.set_subsystem = set_subsystem,
};
@@ -830,6 +839,7 @@ static struct device_operations device_ops = {
.set_resources = pci_dev_set_resources,
.enable_resources = pch_lpc_enable_resources,
.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
+ .acpi_fill_ssdt_generator = southbridge_fill_ssdt,
.write_acpi_tables = acpi_write_hpet,
.init = lpc_init,
.enable = pch_lpc_enable,