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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-02-09 19:21:30 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-02-16 20:10:54 +0100
commit6f6a249a75927476ba5e06bb2b0a0138e0cf63ea (patch)
tree81c789db2e93396738929c9bb3b26b84771135b6 /src/southbridge/intel/ibexpeak
parent6e56de3d202c2175a13c91ab2c1bc1eb0d7f652a (diff)
downloadcoreboot-6f6a249a75927476ba5e06bb2b0a0138e0cf63ea.tar.xz
usbdebug: Remove EHCI_DEBUG_OFFSET
Read this variable from PCI configuration capabilities list instead. Change-Id: I0cfe981833873397c32cd3aa2af307f35f01784b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5176 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/southbridge/intel/ibexpeak')
-rw-r--r--src/southbridge/intel/ibexpeak/Kconfig4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig
index 97d5883222..c05fe43475 100644
--- a/src/southbridge/intel/ibexpeak/Kconfig
+++ b/src/southbridge/intel/ibexpeak/Kconfig
@@ -39,10 +39,6 @@ config EHCI_BAR
hex
default 0xfef00000
-config EHCI_DEBUG_OFFSET
- hex
- default 0xa0
-
config DRAM_RESET_GATE_GPIO
int
default 60