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authorMartin Roth <gaumless@gmail.com>2015-06-20 16:17:12 -0600
committerMartin Roth <gaumless@gmail.com>2015-06-23 22:48:45 +0200
commit59aa2b191b5b510e6a0567f6d2be5d1b97195c95 (patch)
tree2efb596e30a342423b7f18ff4984dcc0e207511b /src/southbridge/intel/lynxpoint/Kconfig
parent6ab0fd0a9455d35dde5c359845d35bb337b7666e (diff)
downloadcoreboot-59aa2b191b5b510e6a0567f6d2be5d1b97195c95.tar.xz
southbridge/intel: Create common IFD Kconfig and Makefile
We've got a lot of duplicated code to set up the IFD/ME/TXE/GBE/ETC. This is the start of creating a common interface for all of them. This also allows us to reduce the chipset dependencies for CBFS_SIZE. Change-Id: Iff08f74305d5ce545b5863915359eeb91eab0208 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/10613 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/Kconfig')
-rw-r--r--src/southbridge/intel/lynxpoint/Kconfig61
1 files changed, 7 insertions, 54 deletions
diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig
index 2747b21cf9..2c71ab2a53 100644
--- a/src/southbridge/intel/lynxpoint/Kconfig
+++ b/src/southbridge/intel/lynxpoint/Kconfig
@@ -32,6 +32,8 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
select SPI_FLASH
+ select HAVE_INTEL_FIRMWARE
+ select USES_INTEL_ME
config INTEL_LYNXPOINT_LP
bool
@@ -59,60 +61,20 @@ config HAVE_IFD_BIN
default y
config BUILD_WITH_FAKE_IFD
- bool "Build with a fake IFD"
+ bool
default y if !HAVE_IFD_BIN
- help
- If you don't have an Intel Firmware Descriptor (ifd.bin) for your
- board, you can select this option and coreboot will build without it.
- Though, the resulting coreboot.rom will not contain all parts required
- to get coreboot running on your board. You can however write only the
- BIOS section to your board's flash ROM and keep the other sections
- untouched. Unfortunately the current version of flashrom doesn't
- support this yet. But there is a patch pending [1].
-
- WARNING: Never write a complete coreboot.rom to your flash ROM if it
- was built with a fake IFD. It just won't work.
-
- [1] http://www.flashrom.org/pipermail/flashrom/2013-June/011083.html
-
-config IFD_BIOS_SECTION
- depends on BUILD_WITH_FAKE_IFD
- string
- default ""
-
-config IFD_ME_SECTION
- depends on BUILD_WITH_FAKE_IFD
- string
- default ""
-
-config IFD_GBE_SECTION
- depends on BUILD_WITH_FAKE_IFD
- string
- default ""
-
-config IFD_PLATFORM_SECTION
- depends on BUILD_WITH_FAKE_IFD
- string
- default ""
config IFD_BIN_PATH
- string "Path to intel firmware descriptor"
+ string
depends on !BUILD_WITH_FAKE_IFD
default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin"
config HAVE_ME_BIN
- bool "Add Intel Management Engine firmware"
+ bool
default y
- help
- The Intel processor in the selected system requires a special firmware
- for an integrated controller called Management Engine (ME). The ME
- firmware might be provided in coreboot's 3rdparty/blobs repository. If
- not and if you don't have the firmware elsewhere, you can still
- build coreboot without it. In this case however, you'll have to make
- sure that you don't overwrite your ME firmware on your flash ROM.
config ME_BIN_PATH
- string "Path to management engine firmware"
+ string
depends on HAVE_ME_BIN
default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/me.bin"
@@ -133,16 +95,7 @@ config FINALIZE_USB_ROUTE_XHCI
to the XHCI controller during the finalize SMM callback.
config LOCK_MANAGEMENT_ENGINE
- bool "Lock Management Engine section"
+ bool
default n
- help
- The Intel Management Engine supports preventing write accesses
- from the host to the Management Engine section in the firmware
- descriptor. If the ME section is locked, it can only be overwritten
- with an external SPI flash programmer. You will want this if you
- want to increase security of your ROM image once you are sure
- that the ME firmware is no longer going to change.
-
- If unsure, say N.
endif