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| author | Duncan Laurie <dlaurie@chromium.org> | 2013-03-07 14:06:43 -0800 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-03-21 23:05:45 +0100 |
| commit | 5cc51c08cd44e2749f4a27775cefffd4b91e0a50 (patch) | |
| tree | f7ff55f3a2a6dadf8bf22630a015bb2153aff7c4 /src/southbridge/intel/lynxpoint/Makefile.inc | |
| parent | 7a3fd4de053e055ce6854e7ec42fb00da532d3d3 (diff) | |
| download | coreboot-5cc51c08cd44e2749f4a27775cefffd4b91e0a50.tar.xz | |
lynxpoint: Add function for checking for LP chipset
Add a helper function pch_is_lp() that will return 1 if
the current chipset is of the new "low power" variant used
with Haswell ULT.
Additionally these functions are added to SMM so it can
be used there.
Change-Id: I9acdea2c56076cd8d9627aba66cf0844c56a38fb
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/2811
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/Makefile.inc')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc index fd5b4df9af..3710135487 100644 --- a/src/southbridge/intel/lynxpoint/Makefile.inc +++ b/src/southbridge/intel/lynxpoint/Makefile.inc @@ -45,7 +45,7 @@ ramstage-y += spi.c smm-$(CONFIG_SPI_FLASH_SMM) += spi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c -smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me_9.x.c finalize.c +smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me_9.x.c finalize.c pch.c romstage-y += early_usb.c early_smbus.c early_me.c me_status.c early_pch.c romstage-$(CONFIG_USBDEBUG) += usb_debug.c |