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| author | Duncan Laurie <dlaurie@chromium.org> | 2013-08-08 15:31:51 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2013-12-21 12:02:24 +0100 |
| commit | 0dc0d1383df258bbb18dec18e0bf7e00dfda1651 (patch) | |
| tree | c0aa550e7d53e2ecff0a836f51aa8d66b83b1b46 /src/southbridge/intel/lynxpoint/chip.h | |
| parent | 2017b4a44fcb8dcf01852d00391d71be5c041523 (diff) | |
| download | coreboot-0dc0d1383df258bbb18dec18e0bf7e00dfda1651.tar.xz | |
lynxpoint: me: Support ICC clock enables message
This message allows unused clocks to be disabled based on a
devicetree setting in each mainboard.
Change-Id: Ib1988cab3748490cf24028752562c64ccbce2054
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65250
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4450
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/chip.h')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/chip.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/chip.h b/src/southbridge/intel/lynxpoint/chip.h index 70f3e63a63..a0e2232788 100644 --- a/src/southbridge/intel/lynxpoint/chip.h +++ b/src/southbridge/intel/lynxpoint/chip.h @@ -92,6 +92,13 @@ struct southbridge_intel_lynxpoint_config { /* I2C voltage select: 0=3.3V 1=1.8V */ uint8_t sio_i2c0_voltage; uint8_t sio_i2c1_voltage; + + /* + * Clock Disable Map: + * [21:16] = CLKOUT_PCIE# 5-0 + * [24] = CLKOUT_ITPXDP + */ + uint32_t icc_clock_disable; }; extern struct chip_operations southbridge_intel_lynxpoint_ops; |