summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/lynxpoint/lp_gpio.c
diff options
context:
space:
mode:
authorDuncan Laurie <dlaurie@chromium.org>2013-04-23 13:43:23 -0700
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-11-24 08:02:51 +0100
commit55ad9724322739a862745a71806af8d9a870601b (patch)
tree25f1943cf8e639f363b4d475e38c25e34a5f651a /src/southbridge/intel/lynxpoint/lp_gpio.c
parent0edc22490a643c4b4c6181c42eed375485f9e0e4 (diff)
downloadcoreboot-55ad9724322739a862745a71806af8d9a870601b.tar.xz
lynxpoint: Rework LP GPIO handling
This adds some macros for the common GPIO defines and drops the gpio number definition from each entry. The end result is much easier to read. The wtm2 mainboard gpio list is modified to use this. Also fix a bug in the LP version of get_gpio() that was always returning zero due to a miscompare. Change-Id: I143e5aee412af1eda84e35f8026f31cf13df508e Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/48946 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4138 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/lp_gpio.c')
-rw-r--r--src/southbridge/intel/lynxpoint/lp_gpio.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/southbridge/intel/lynxpoint/lp_gpio.c b/src/southbridge/intel/lynxpoint/lp_gpio.c
index a6e4f5c998..d64555e668 100644
--- a/src/southbridge/intel/lynxpoint/lp_gpio.c
+++ b/src/southbridge/intel/lynxpoint/lp_gpio.c
@@ -45,19 +45,19 @@ void setup_pch_lp_gpios(const struct pch_lp_gpio_map map[])
u32 irqen[3] = {0};
u32 reset[3] = {0};
u32 blink = 0;
- int set, bit;
+ int set, bit, gpio = 0;
- for (config = map; config->gpio != GPIO_LIST_END; config++) {
- if (config->gpio > MAX_GPIO_NUMBER)
- continue;
+ for (config = map; config->conf0 != GPIO_LIST_END; config++, gpio++) {
+ if (gpio > MAX_GPIO_NUMBER)
+ break;
/* Setup Configuration registers 1 and 2 */
- outl(config->conf0, gpio_base + GPIO_CONFIG0(config->gpio));
- outl(config->conf1, gpio_base + GPIO_CONFIG1(config->gpio));
+ outl(config->conf0, gpio_base + GPIO_CONFIG0(gpio));
+ outl(config->conf1, gpio_base + GPIO_CONFIG1(gpio));
/* Determine set and bit based on GPIO number */
- set = config->gpio >> 5;
- bit = config->gpio % 32;
+ set = gpio >> 5;
+ bit = gpio % 32;
/* Apply settings to set specific bits */
owner[set] |= config->owner << bit;
@@ -83,7 +83,7 @@ int get_gpio(int gpio_num)
{
u16 gpio_base = get_gpio_base();
- if (gpio_num < MAX_GPIO_NUMBER)
+ if (gpio_num > MAX_GPIO_NUMBER)
return 0;
return !!(inl(gpio_base + GPIO_CONFIG0(gpio_num)) & GPI_LEVEL);