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author | Duncan Laurie <dlaurie@chromium.org> | 2013-03-08 16:06:06 -0800 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-03-21 23:08:56 +0100 |
commit | f5966b14e8d2a0613d5cbafbf73d76bed371899d (patch) | |
tree | ae9fb6d80588fc550a5fe649dcd16f8dc5aa0064 /src/southbridge/intel/lynxpoint/lpc.c | |
parent | 55cdf5519074ebaf972edff488be7f1340436ca1 (diff) | |
download | coreboot-f5966b14e8d2a0613d5cbafbf73d76bed371899d.tar.xz |
lynxpoint: remove DEBUG_PERIODIC_SMIS
This was put in for debugging and experimentation on i945
and has been copied around since. Drop it from lynxpoint.
Change-Id: I0b53f4e1362cd3ce703625ef2b4988139c48b989
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/2814
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/lpc.c')
-rw-r--r-- | src/southbridge/intel/lynxpoint/lpc.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index eaf926ca7c..89cf9e7c01 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -255,12 +255,6 @@ static void pch_power_options(device_t dev) reg16 = pci_read_config16(dev, GEN_PMCON_1); reg16 &= ~(3 << 0); // SMI# rate 1 minute reg16 &= ~(1 << 10); // Disable BIOS_PCI_EXP_EN for native PME -#if DEBUG_PERIODIC_SMIS - /* Set DEBUG_PERIODIC_SMIS in pch.h to debug using - * periodic SMIs. - */ - reg16 |= (3 << 0); // Periodic SMI every 8s -#endif pci_write_config16(dev, GEN_PMCON_1, reg16); // Set the board's GPI routing. |