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authorAaron Durbin <adurbin@chromium.org>2012-12-11 17:17:38 -0600
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-03-14 18:23:45 +0100
commit569c653a72cce2a29688f86849d48a5f0f935cf1 (patch)
tree7522b28c0d7076822f6819e6f0184c6535ef83ef /src/southbridge/intel/lynxpoint/me_status.c
parentf72ad02158945c0c80aedd81218fb4fc4080cf1e (diff)
downloadcoreboot-569c653a72cce2a29688f86849d48a5f0f935cf1.tar.xz
lynx point: add new ME status information
According to the 0.8.0 ME BWG this is a new state. It's not very clear what exactly it entails, but the Basking Ridge CRB was tripping it when MRC_DEBUG was enabled (presumably because of a DID timeout). Instead of 0x17 one can now see the proper message for this state. Change-Id: I5bda1de7d3d957d38a4760a02dcd170ec48782e9 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2640 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/me_status.c')
-rw-r--r--src/southbridge/intel/lynxpoint/me_status.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/me_status.c b/src/southbridge/intel/lynxpoint/me_status.c
index 1feaf7d4f0..d09be7b30c 100644
--- a/src/southbridge/intel/lynxpoint/me_status.c
+++ b/src/southbridge/intel/lynxpoint/me_status.c
@@ -109,6 +109,7 @@ static const char *me_progress_bup_values[] = {
[ME_HFS2_STATE_BUP_M0] = "Bringup in M0",
[ME_HFS2_STATE_BUP_FLOW_DET_ERR] = "Flow detection error",
[ME_HFS2_STATE_BUP_M3_CLK_ERR] = "M3 clock switching error",
+ [ME_HFS2_STATE_BUP_CPU_RESET_DID_TIMEOUT_MEM_MISSING] = "Host error - CPU reset timeout, DID timeout, memory missing",
[ME_HFS2_STATE_BUP_M3_KERN_LOAD] = "M3 kernel load",
[ME_HFS2_STATE_BUP_T32_MISSING] = "T34 missing - cannot program ICC",
[ME_HFS2_STATE_BUP_WAIT_DID] = "Waiting for DID BIOS message",