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authorStefan Reinauer <reinauer@chromium.org>2013-03-21 18:43:51 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-03-22 03:37:23 +0100
commit5605f1b4ab7661f893bf0f10aea72cacdd51dc99 (patch)
tree01928e2770dea00e2d052c45d5f44d0f52045253 /src/southbridge/intel/lynxpoint/pch.c
parentdb6c5bfd8bdef4489e7fec533cb2ca8ae6c24cf3 (diff)
downloadcoreboot-5605f1b4ab7661f893bf0f10aea72cacdd51dc99.tar.xz
Fix compilation of Intel LynxPoint based boards
The haswell patches that verified correctly were not yet submitted, but verified correctly. However they still used romcc_io.h which was dropped in another patch earlier today. With a lot of development happening in parallel, this is unfortunately nothing that the gerrit 2.6 Rebase If Necessary submit type could have fixed. Change-Id: Ifef9ae05b22c408e78d6cff37defd68e4ed91ed9 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2876 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel/lynxpoint/pch.c')
-rw-r--r--src/southbridge/intel/lynxpoint/pch.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/src/southbridge/intel/lynxpoint/pch.c b/src/southbridge/intel/lynxpoint/pch.c
index b4f64e1436..cc3718d444 100644
--- a/src/southbridge/intel/lynxpoint/pch.c
+++ b/src/southbridge/intel/lynxpoint/pch.c
@@ -21,14 +21,10 @@
#include <console/console.h>
#include <delay.h>
-#ifdef __SMM__
#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <device/pci_def.h>
-#else /* !__SMM__ */
#include <device/device.h>
#include <device/pci.h>
-#endif
+#include <device/pci_def.h>
#include "pch.h"
static device_t pch_get_lpc_device(void)