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authorMartin Roth <martin@coreboot.org>2019-10-23 21:46:03 -0600
committerPatrick Georgi <pgeorgi@google.com>2019-10-30 11:16:56 +0000
commitff744bf0eee875a03dc98dd6792e3ed0ff4456a0 (patch)
tree691260ffe71abac0bb8e2a5607b0d6f1cfb16028 /src/southbridge/intel/lynxpoint/pch.h
parent5331a7cff9ebf6f92542eee53e6556a4d5a0dc75 (diff)
downloadcoreboot-ff744bf0eee875a03dc98dd6792e3ed0ff4456a0.tar.xz
src/southbridge: change "unsigned" to "unsigned int"
Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Iee2056a50a1201626fa29194afdbfc1f11094420 Reviewed-on: https://review.coreboot.org/c/coreboot/+/36333 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/pch.h')
-rw-r--r--src/southbridge/intel/lynxpoint/pch.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index be4285b1da..d83dd17275 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -177,7 +177,7 @@ void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
void enable_smbus(void);
#if ENV_ROMSTAGE
-int smbus_read_byte(unsigned device, unsigned address);
+int smbus_read_byte(unsigned int device, unsigned int address);
#endif
void enable_usb_bar(void);