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| author | Aaron Durbin <adurbin@chromium.org> | 2013-04-10 14:59:21 -0500 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2013-11-24 16:03:18 +0100 |
| commit | f24262d01822bd8634e44b5aab19dafe7e04ae72 (patch) | |
| tree | 2cef436c007ecbef9508e61c8196b535c7228942 /src/southbridge/intel/lynxpoint/pch.h | |
| parent | 7c351316429f8b991df7ea233a5528f4efb3b8e0 (diff) | |
| download | coreboot-f24262d01822bd8634e44b5aab19dafe7e04ae72.tar.xz | |
haswell: calibrate 24MHz clock against BCLK
On haswell ULT systems there is a 24MHz clock that continuously runs
when deep package c-states are entered. The 100MHz BCLK is shut down
in the lower c-states. When the package wakes back up a conversion
formula needs to be applied. The 24MHz calibration is done using the
internal PCODE unit.
Change-Id: I6be7702fb1de1429273724536f5af9125b98da64
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48292
Tested-by: Stefan Reinauer <reinauer@google.com>
Commit-Queue: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/4136
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/pch.h')
0 files changed, 0 insertions, 0 deletions