diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-18 16:33:39 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-21 07:00:45 +0000 |
| commit | 12b121cdb450d96309dd96b2ccc25fc5501d2250 (patch) | |
| tree | 1d94c123c23512b811d69d9876ac9a860bbbe0f6 /src/southbridge/intel/lynxpoint/pcie.c | |
| parent | 544b572c07bb09aba36705b5d8ffca3b793323f6 (diff) | |
| download | coreboot-12b121cdb450d96309dd96b2ccc25fc5501d2250.tar.xz | |
southbridge/intel: Tidy up preprocessor and headers
Change-Id: I52a7b39566acd64ac21a345046675e05649a40f5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34980
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/pcie.c')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/pcie.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/pcie.c b/src/southbridge/intel/lynxpoint/pcie.c index 2a8b44e0fc..a3b2e096d8 100644 --- a/src/southbridge/intel/lynxpoint/pcie.c +++ b/src/southbridge/intel/lynxpoint/pcie.c @@ -26,6 +26,7 @@ #include <southbridge/intel/common/gpio.h> #include <stddef.h> #include <stdint.h> +#include "chip.h" #define MAX_NUM_ROOT_PORTS 8 |