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authorShawn Nematbakhsh <shawnn@chromium.org>2013-08-13 10:45:21 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2013-12-21 12:03:00 +0100
commit287522749ececda35b52dc9b9e8e704e305ec888 (patch)
tree9bf72bb1d0f2d14d25f09d4925b58790c25c80f9 /src/southbridge/intel/lynxpoint/sata.c
parent190688c65f7c128f2dace3b600d1c0f2e56723ee (diff)
downloadcoreboot-287522749ececda35b52dc9b9e8e704e305ec888.tar.xz
lynxpoint: Add configuration option for SATA gen3 DTLE registers
Allow DTLE DATA / EDGE registers to be configured in board-specific devicetree. Change-Id: I82307d08c9cf73461db3ac7fb875a4fe70d6f9ea Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/65716 Reviewed-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/4475 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/sata.c')
-rw-r--r--src/southbridge/intel/lynxpoint/sata.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/sata.c b/src/southbridge/intel/lynxpoint/sata.c
index 89128659bb..a8d831955e 100644
--- a/src/southbridge/intel/lynxpoint/sata.c
+++ b/src/southbridge/intel/lynxpoint/sata.c
@@ -233,6 +233,31 @@ static void sata_init(struct device *dev)
pch_iobp_update(SATA_IOBP_SP1G3IR, 0,
config->sata_port1_gen3_tx);
+ /* Set Gen3 DTLE DATA / EDGE registers if needed */
+ if (config->sata_port0_gen3_dtle) {
+ pch_iobp_update(SATA_IOBP_SP0DTLE_DATA,
+ ~(SATA_DTLE_MASK << SATA_DTLE_DATA_SHIFT),
+ (config->sata_port0_gen3_dtle & SATA_DTLE_MASK)
+ << SATA_DTLE_DATA_SHIFT);
+
+ pch_iobp_update(SATA_IOBP_SP0DTLE_EDGE,
+ ~(SATA_DTLE_MASK << SATA_DTLE_EDGE_SHIFT),
+ (config->sata_port0_gen3_dtle & SATA_DTLE_MASK)
+ << SATA_DTLE_EDGE_SHIFT);
+ }
+
+ if (config->sata_port1_gen3_dtle) {
+ pch_iobp_update(SATA_IOBP_SP1DTLE_DATA,
+ ~(SATA_DTLE_MASK << SATA_DTLE_DATA_SHIFT),
+ (config->sata_port1_gen3_dtle & SATA_DTLE_MASK)
+ << SATA_DTLE_DATA_SHIFT);
+
+ pch_iobp_update(SATA_IOBP_SP1DTLE_EDGE,
+ ~(SATA_DTLE_MASK << SATA_DTLE_EDGE_SHIFT),
+ (config->sata_port1_gen3_dtle & SATA_DTLE_MASK)
+ << SATA_DTLE_EDGE_SHIFT);
+ }
+
/* Additional Programming Requirements */
/* Power Optimizer */