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| author | Tristan Corrick <tristan@corrick.kiwi> | 2018-11-30 22:53:01 +1300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-03 13:08:59 +0000 |
| commit | 09fc6342d27bef78aa10e03a5e27bb6322732c66 (patch) | |
| tree | 3fed2109d0bfd61e905b8320434006c17662793b /src/southbridge/intel/lynxpoint/smihandler.c | |
| parent | f39e0f9318c44dc51f7b439c84bfe2fbe9940960 (diff) | |
| download | coreboot-09fc6342d27bef78aa10e03a5e27bb6322732c66.tar.xz | |
sb/intel/lynxpoint: Make the finalise handler common
The ASRock H81M-HDS doesn't implement a finalise handler. To fix
this, and reduce code duplication in the process, make a common
implementation. There should be no functional change to boards with
existing finalise handlers, since the code is identical among them and
the new, common implementation.
Tested on an ASRock H81M-HDS. The finalise handler works.
Change-Id: I13b581a2219288019a4e0c9e618db3ac7c3c15ab
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/29975
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/smihandler.c')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/smihandler.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index 87848c23c7..12e5ea2eb6 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -25,6 +25,8 @@ #include <elog.h> #include <halt.h> #include <pc80/mc146818rtc.h> +#include <northbridge/intel/haswell/haswell.h> +#include <cpu/intel/haswell/haswell.h> #include "pch.h" #include "nvs.h" @@ -270,11 +272,24 @@ static void southbridge_smi_apmc(void) { u8 reg8; em64t101_smm_state_save_area_t *state; + static int chipset_finalized = 0; /* Emulate B2 register as the FADT / Linux expects it */ reg8 = inb(APM_CNT); switch (reg8) { + case APM_CNT_FINALIZE: + if (chipset_finalized) { + printk(BIOS_DEBUG, "SMI#: Already finalized\n"); + return; + } + + intel_pch_finalize_smm(); + intel_northbridge_haswell_finalize_smm(); + intel_cpu_haswell_finalize_smm(); + + chipset_finalized = 1; + break; case APM_CNT_CST_CONTROL: /* Calling this function seems to cause * some kind of race condition in Linux |