diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-04-28 10:13:05 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-01 06:22:27 +0000 |
| commit | 73ae076e954ea6acd2fd22386616cd4ce839c830 (patch) | |
| tree | fe4dfa4a69391000f117a09bae8f2d5551e98758 /src/southbridge/intel/lynxpoint/usb_ehci.c | |
| parent | 8b6dfdeb203c5e10c804398b822f85df2b4b6d26 (diff) | |
| download | coreboot-73ae076e954ea6acd2fd22386616cd4ce839c830.tar.xz | |
sb/intel/lynxpoint: Fix 16-bit read/write PCI_COMMAND register
Change-Id: I81b740e0cfcf0e1bf096427b45ffba06d357fee6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40792
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/usb_ehci.c')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/usb_ehci.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/src/southbridge/intel/lynxpoint/usb_ehci.c b/src/southbridge/intel/lynxpoint/usb_ehci.c index ce81f76f44..1fde466eb7 100644 --- a/src/southbridge/intel/lynxpoint/usb_ehci.c +++ b/src/southbridge/intel/lynxpoint/usb_ehci.c @@ -16,7 +16,6 @@ void usb_ehci_disable(pci_devfn_t dev) { u16 reg16; - u32 reg32; /* Set 0xDC[0]=1 */ pci_or_config32(dev, 0xdc, (1 << 0)); @@ -29,9 +28,9 @@ void usb_ehci_disable(pci_devfn_t dev) /* Clear memory and bus master */ pci_write_config32(dev, PCI_BASE_ADDRESS_0, 0); - reg32 = pci_read_config32(dev, PCI_COMMAND); - reg32 &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); - pci_write_config32(dev, PCI_COMMAND, reg32); + reg16 = pci_read_config16(dev, PCI_COMMAND); + reg16 &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); + pci_write_config16(dev, PCI_COMMAND, reg16); /* Disable device */ switch (dev) { @@ -56,7 +55,7 @@ void usb_ehci_sleep_prepare(pci_devfn_t dev, u8 slp_typ) bar0_base = (u8 *)pci_read_config32(dev, PCI_BASE_ADDRESS_0); if (bar0_base == 0 || bar0_base == (u8 *)0xffffffff) return; - pci_cmd = pci_read_config32(dev, PCI_COMMAND); + pci_cmd = pci_read_config16(dev, PCI_COMMAND); switch (slp_typ) { case ACPI_S4: |