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author | Angel Pons <th3fanbus@gmail.com> | 2020-08-10 13:02:20 +0200 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-12 10:54:06 +0000 |
commit | 0b3512b495528adfe29fe7d9267a59361a6f01cd (patch) | |
tree | da2eab9c29252746a0bd7b7089a03480fbf75d62 /src/southbridge/intel/lynxpoint | |
parent | 1d68d6d14d4c9f6e414845335bb6a8493a6d5d62 (diff) | |
download | coreboot-0b3512b495528adfe29fe7d9267a59361a6f01cd.tar.xz |
sb/intel: Remove inexistent references to IDE controller
This device doesn't exist on these southbridges.
Change-Id: Ie17427ba044c465adf95300ff7f5610c25ae3373
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44327
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/lynxpoint')
-rw-r--r-- | src/southbridge/intel/lynxpoint/pch.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index 99469448d7..893bfde457 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -212,8 +212,7 @@ void mainboard_config_rcba(void); #define LPC_GEN4_DEC 0x90 /* LPC IF Generic Decode Range 4 */ #define LGMR 0x98 /* LPC Generic Memory Range */ -/* PCI Configuration Space (D31:F1): IDE */ -#define PCH_IDE_DEV PCI_DEV(0, 0x1f, 1) +/* PCI Configuration Space (D31:F2): SATA */ #define PCH_SATA_DEV PCI_DEV(0, 0x1f, 2) #define PCH_SATA2_DEV PCI_DEV(0, 0x1f, 5) #define INTR_LN 0x3c |