summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/lynxpoint
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2018-11-29 16:13:14 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-03 13:01:42 +0000
commitab72fc24beb3ca95a5d34faa67c33e99873200cf (patch)
treee02c28d71ced450a27c3d38e8720efa7cffcd513 /src/southbridge/intel/lynxpoint
parent6902203ce6cfe9173c04e4b71696a07665341914 (diff)
downloadcoreboot-ab72fc24beb3ca95a5d34faa67c33e99873200cf.tar.xz
sb/intel/lynxpoint/usb_{e,x}hci.c: Don't use device_t
Use of device_t is deprecated. Change-Id: Ie75450c844e2317ded157465eb0fc6a9ec1b3ab0 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/29932 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint')
-rw-r--r--src/southbridge/intel/lynxpoint/usb_ehci.c7
-rw-r--r--src/southbridge/intel/lynxpoint/usb_xhci.c10
2 files changed, 9 insertions, 8 deletions
diff --git a/src/southbridge/intel/lynxpoint/usb_ehci.c b/src/southbridge/intel/lynxpoint/usb_ehci.c
index e2486cfa02..7f300d68eb 100644
--- a/src/southbridge/intel/lynxpoint/usb_ehci.c
+++ b/src/southbridge/intel/lynxpoint/usb_ehci.c
@@ -25,7 +25,7 @@
#ifdef __SMM__
-void usb_ehci_disable(device_t dev)
+void usb_ehci_disable(pci_devfn_t dev)
{
u16 reg16;
u32 reg32;
@@ -57,7 +57,7 @@ void usb_ehci_disable(device_t dev)
}
/* Handler for EHCI controller on entry to S3/S4/S5 */
-void usb_ehci_sleep_prepare(device_t dev, u8 slp_typ)
+void usb_ehci_sleep_prepare(pci_devfn_t dev, u8 slp_typ)
{
u32 reg32;
u8 *bar0_base;
@@ -164,7 +164,8 @@ static void usb_ehci_init(struct device *dev)
printk(BIOS_DEBUG, "done.\n");
}
-static void usb_ehci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void usb_ehci_set_subsystem(struct device *dev, unsigned int vendor,
+ unsigned int device)
{
u8 access_cntl;
diff --git a/src/southbridge/intel/lynxpoint/usb_xhci.c b/src/southbridge/intel/lynxpoint/usb_xhci.c
index af0e56f052..186e3f9c6f 100644
--- a/src/southbridge/intel/lynxpoint/usb_xhci.c
+++ b/src/southbridge/intel/lynxpoint/usb_xhci.c
@@ -154,7 +154,7 @@ static void usb_xhci_reset_usb3(device_t dev, int all)
#ifdef __SMM__
/* Handler for XHCI controller on entry to S3/S4/S5 */
-void usb_xhci_sleep_prepare(device_t dev, u8 slp_typ)
+void usb_xhci_sleep_prepare(pci_devfn_t dev, u8 slp_typ)
{
u16 reg16;
u32 reg32;
@@ -238,7 +238,7 @@ void usb_xhci_route_all(void)
#else /* !__SMM__ */
-static void usb_xhci_clock_gating(device_t dev)
+static void usb_xhci_clock_gating(struct device *dev)
{
u32 reg32;
u16 reg16;
@@ -285,7 +285,7 @@ static void usb_xhci_clock_gating(device_t dev)
pci_write_config32(dev, 0xa4, reg32);
}
-static void usb_xhci_init(device_t dev)
+static void usb_xhci_init(struct device *dev)
{
u32 reg32;
u16 reg16;
@@ -359,8 +359,8 @@ static void usb_xhci_init(device_t dev)
}
}
-static void usb_xhci_set_subsystem(device_t dev, unsigned vendor,
- unsigned device)
+static void usb_xhci_set_subsystem(struct device *dev, unsigned int vendor,
+ unsigned int device)
{
if (!vendor || !device) {
pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,