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authorPatrick Georgi <patrick@georgi-clan.de>2012-10-05 21:54:38 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2012-10-08 21:23:08 +0200
commit9aeb69447d3839675b2cac51c3e95a4724fd9b0d (patch)
treed9b1cc7483a51ab340d6d9fae78a30e562f99767 /src/southbridge/intel/sch
parentec2c18ee6068ef6adf6f5be437d7047c91773654 (diff)
downloadcoreboot-9aeb69447d3839675b2cac51c3e95a4724fd9b0d.tar.xz
hpet: common ACPI generation
HPET's min ticks (minimum time between events to avoid losing interrupts) is chipset specific, so move it to Kconfig. Via also has a special base address, so move it as well. Apart from these (and the base address was already #defined), the table is very uniform. Change-Id: I848a2e2b0b16021c7ee5ba99097fa6a5886c3286 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/1562 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Diffstat (limited to 'src/southbridge/intel/sch')
-rw-r--r--src/southbridge/intel/sch/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/southbridge/intel/sch/Kconfig b/src/southbridge/intel/sch/Kconfig
index 83ff447f3e..32eb8688ec 100644
--- a/src/southbridge/intel/sch/Kconfig
+++ b/src/southbridge/intel/sch/Kconfig
@@ -48,5 +48,9 @@ config CMC_FILE
The path and filename of the file to use as CMC state machine
binary.
+config HPET_MIN_TICKS
+ hex
+ default 0x80
+
endif