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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-03 08:01:05 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-04 15:57:39 +0000
commit13f66507afdcde5170546e5ca1ce5a945895eb10 (patch)
tree40c1d05a05b05b596f290c186aa59a8b4d9768ab /src/southbridge/intel
parent065857ee7fd61b05025d7a803e82f2b9b53cbc9a (diff)
downloadcoreboot-13f66507afdcde5170546e5ca1ce5a945895eb10.tar.xz
device/mmio.h: Add include file for MMIO ops
MMIO operations are arch-agnostic so the include path should not be arch/. Change-Id: I0fd70f5aeca02e98e96b980c3aca0819f5c44b98 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31691 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/bd82x6x/azalia.c2
-rw-r--r--src/southbridge/intel/bd82x6x/early_pch.c2
-rw-r--r--src/southbridge/intel/bd82x6x/early_thermal.c2
-rw-r--r--src/southbridge/intel/bd82x6x/early_usb.c1
-rw-r--r--src/southbridge/intel/bd82x6x/me.c2
-rw-r--r--src/southbridge/intel/bd82x6x/me_8.x.c2
-rw-r--r--src/southbridge/intel/bd82x6x/sata.c2
-rw-r--r--src/southbridge/intel/bd82x6x/usb_ehci.c2
-rw-r--r--src/southbridge/intel/common/spi.c2
-rw-r--r--src/southbridge/intel/fsp_rangeley/early_init.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/gpio.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/lpc.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/romstage.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/sata.c2
-rw-r--r--src/southbridge/intel/fsp_rangeley/spi.c2
-rw-r--r--src/southbridge/intel/i82801gx/azalia.c2
-rw-r--r--src/southbridge/intel/i82801gx/usb_ehci.c2
-rw-r--r--src/southbridge/intel/i82801ix/hdaudio.c2
-rw-r--r--src/southbridge/intel/i82801ix/sata.c1
-rw-r--r--src/southbridge/intel/i82801ix/thermal.c2
-rw-r--r--src/southbridge/intel/i82801jx/hdaudio.c2
-rw-r--r--src/southbridge/intel/i82801jx/sata.c1
-rw-r--r--src/southbridge/intel/i82801jx/thermal.c2
-rw-r--r--src/southbridge/intel/ibexpeak/azalia.c2
-rw-r--r--src/southbridge/intel/ibexpeak/early_thermal.c2
-rw-r--r--src/southbridge/intel/ibexpeak/lpc.c1
-rw-r--r--src/southbridge/intel/ibexpeak/me.c2
-rw-r--r--src/southbridge/intel/ibexpeak/sata.c2
-rw-r--r--src/southbridge/intel/ibexpeak/thermal.c2
-rw-r--r--src/southbridge/intel/ibexpeak/usb_ehci.c2
-rw-r--r--src/southbridge/intel/lynxpoint/azalia.c2
-rw-r--r--src/southbridge/intel/lynxpoint/hda_verb.c2
-rw-r--r--src/southbridge/intel/lynxpoint/me_9.x.c2
-rw-r--r--src/southbridge/intel/lynxpoint/sata.c2
-rw-r--r--src/southbridge/intel/lynxpoint/serialio.c2
-rw-r--r--src/southbridge/intel/lynxpoint/usb_ehci.c2
-rw-r--r--src/southbridge/intel/lynxpoint/usb_xhci.c1
37 files changed, 37 insertions, 28 deletions
diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c
index e960b061cb..0cc9efa133 100644
--- a/src/southbridge/intel/bd82x6x/azalia.c
+++ b/src/southbridge/intel/bd82x6x/azalia.c
@@ -20,7 +20,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <delay.h>
#include <device/azalia_device.h>
#include "pch.h"
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index 2e1c5fc2a2..b5fbfbb071 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -14,7 +14,7 @@
*/
#include <string.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <arch/cbfs.h>
#include <ip_checksum.h>
diff --git a/src/southbridge/intel/bd82x6x/early_thermal.c b/src/southbridge/intel/bd82x6x/early_thermal.c
index f29ba5da6a..63da2d65f4 100644
--- a/src/southbridge/intel/bd82x6x/early_thermal.c
+++ b/src/southbridge/intel/bd82x6x/early_thermal.c
@@ -14,7 +14,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include "pch.h"
#include "cpu/intel/model_206ax/model_206ax.h"
diff --git a/src/southbridge/intel/bd82x6x/early_usb.c b/src/southbridge/intel/bd82x6x/early_usb.c
index a7321c9991..17919af53a 100644
--- a/src/southbridge/intel/bd82x6x/early_usb.c
+++ b/src/southbridge/intel/bd82x6x/early_usb.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index f5516e39e9..58c24784db 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -23,7 +23,7 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_ids.h>
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c
index 951c8ab4e4..bdd57cdd33 100644
--- a/src/southbridge/intel/bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/bd82x6x/me_8.x.c
@@ -23,7 +23,7 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_ids.h>
diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c
index 02d478ccb0..3ee0a5983b 100644
--- a/src/southbridge/intel/bd82x6x/sata.c
+++ b/src/southbridge/intel/bd82x6x/sata.c
@@ -14,7 +14,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/bd82x6x/usb_ehci.c b/src/southbridge/intel/bd82x6x/usb_ehci.c
index b4060e526f..e98b8bef7a 100644
--- a/src/southbridge/intel/bd82x6x/usb_ehci.c
+++ b/src/southbridge/intel/bd82x6x/usb_ehci.c
@@ -20,7 +20,7 @@
#include <device/pci_ids.h>
#include "pch.h"
#include <device/pci_ehci.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
static void usb_ehci_init(struct device *dev)
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c
index 429de8d447..a030ff4ef5 100644
--- a/src/southbridge/intel/common/spi.c
+++ b/src/southbridge/intel/common/spi.c
@@ -22,7 +22,7 @@
#include <bootstate.h>
#include <commonlib/helpers.h>
#include <delay.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/fsp_rangeley/early_init.c b/src/southbridge/intel/fsp_rangeley/early_init.c
index 05e2812134..32e3bb5f4f 100644
--- a/src/southbridge/intel/fsp_rangeley/early_init.c
+++ b/src/southbridge/intel/fsp_rangeley/early_init.c
@@ -19,6 +19,7 @@
#include <stdlib.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <pc80/mc146818rtc.h>
diff --git a/src/southbridge/intel/fsp_rangeley/gpio.c b/src/southbridge/intel/fsp_rangeley/gpio.c
index 740587a23c..831b1696c4 100644
--- a/src/southbridge/intel/fsp_rangeley/gpio.c
+++ b/src/southbridge/intel/fsp_rangeley/gpio.c
@@ -17,6 +17,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include "soc.h"
diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c
index 4dee6362fb..b93bc09a62 100644
--- a/src/southbridge/intel/fsp_rangeley/lpc.c
+++ b/src/southbridge/intel/fsp_rangeley/lpc.c
@@ -23,6 +23,7 @@
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c
index 39d4362635..65001cfff1 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.c
+++ b/src/southbridge/intel/fsp_rangeley/romstage.c
@@ -19,6 +19,7 @@
#include <lib.h>
#include <timestamp.h>
#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/southbridge/intel/fsp_rangeley/sata.c b/src/southbridge/intel/fsp_rangeley/sata.c
index c4d6fdaf49..3f72a3dfe9 100644
--- a/src/southbridge/intel/fsp_rangeley/sata.c
+++ b/src/southbridge/intel/fsp_rangeley/sata.c
@@ -15,7 +15,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c
index 34d0fa2111..99400fcbeb 100644
--- a/src/southbridge/intel/fsp_rangeley/spi.c
+++ b/src/southbridge/intel/fsp_rangeley/spi.c
@@ -19,7 +19,7 @@
#include <string.h>
#include <commonlib/helpers.h>
#include <delay.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c
index f1866a5116..7bf48ef7b0 100644
--- a/src/southbridge/intel/i82801gx/azalia.c
+++ b/src/southbridge/intel/i82801gx/azalia.c
@@ -19,7 +19,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <delay.h>
#include <device/azalia_device.h>
#include "i82801gx.h"
diff --git a/src/southbridge/intel/i82801gx/usb_ehci.c b/src/southbridge/intel/i82801gx/usb_ehci.c
index 9b79aff5c3..cbefe20540 100644
--- a/src/southbridge/intel/i82801gx/usb_ehci.c
+++ b/src/southbridge/intel/i82801gx/usb_ehci.c
@@ -20,7 +20,7 @@
#include <device/pci_ids.h>
#include "i82801gx.h"
#include <device/pci_ehci.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
static void usb_ehci_init(struct device *dev)
diff --git a/src/southbridge/intel/i82801ix/hdaudio.c b/src/southbridge/intel/i82801ix/hdaudio.c
index d6d72e1803..e47f6e0fcb 100644
--- a/src/southbridge/intel/i82801ix/hdaudio.c
+++ b/src/southbridge/intel/i82801ix/hdaudio.c
@@ -20,7 +20,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <delay.h>
#include <device/azalia_device.h>
#include "i82801ix.h"
diff --git a/src/southbridge/intel/i82801ix/sata.c b/src/southbridge/intel/i82801ix/sata.c
index 65422c8344..0e7f35bce8 100644
--- a/src/southbridge/intel/i82801ix/sata.c
+++ b/src/southbridge/intel/i82801ix/sata.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/i82801ix/thermal.c b/src/southbridge/intel/i82801ix/thermal.c
index 325eb08aae..7316f951c2 100644
--- a/src/southbridge/intel/i82801ix/thermal.c
+++ b/src/southbridge/intel/i82801ix/thermal.c
@@ -15,7 +15,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/i82801jx/hdaudio.c b/src/southbridge/intel/i82801jx/hdaudio.c
index afde2cf6e2..1e852c0cd2 100644
--- a/src/southbridge/intel/i82801jx/hdaudio.c
+++ b/src/southbridge/intel/i82801jx/hdaudio.c
@@ -20,7 +20,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <delay.h>
#include <device/azalia_device.h>
#include "i82801jx.h"
diff --git a/src/southbridge/intel/i82801jx/sata.c b/src/southbridge/intel/i82801jx/sata.c
index bb175e6eb1..bd035de742 100644
--- a/src/southbridge/intel/i82801jx/sata.c
+++ b/src/southbridge/intel/i82801jx/sata.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/i82801jx/thermal.c b/src/southbridge/intel/i82801jx/thermal.c
index d3f0122f22..ac4c596f28 100644
--- a/src/southbridge/intel/i82801jx/thermal.c
+++ b/src/southbridge/intel/i82801jx/thermal.c
@@ -15,7 +15,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/ibexpeak/azalia.c b/src/southbridge/intel/ibexpeak/azalia.c
index 7f3e6cdee4..3cec2a9d9f 100644
--- a/src/southbridge/intel/ibexpeak/azalia.c
+++ b/src/southbridge/intel/ibexpeak/azalia.c
@@ -20,7 +20,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <delay.h>
#include <device/azalia_device.h>
#include "pch.h"
diff --git a/src/southbridge/intel/ibexpeak/early_thermal.c b/src/southbridge/intel/ibexpeak/early_thermal.c
index 6c9f794fc2..defe145404 100644
--- a/src/southbridge/intel/ibexpeak/early_thermal.c
+++ b/src/southbridge/intel/ibexpeak/early_thermal.c
@@ -14,7 +14,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include "pch.h"
#include "cpu/intel/model_2065x/model_2065x.h"
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index 7ae178ef65..51b44381de 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -23,6 +23,7 @@
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c
index 8eafd355c0..d774f80f03 100644
--- a/src/southbridge/intel/ibexpeak/me.c
+++ b/src/southbridge/intel/ibexpeak/me.c
@@ -23,7 +23,7 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_ids.h>
diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c
index ea666663b2..2c24bbf64f 100644
--- a/src/southbridge/intel/ibexpeak/sata.c
+++ b/src/southbridge/intel/ibexpeak/sata.c
@@ -15,7 +15,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/ibexpeak/thermal.c b/src/southbridge/intel/ibexpeak/thermal.c
index bafc83ba31..ca8492b7b3 100644
--- a/src/southbridge/intel/ibexpeak/thermal.c
+++ b/src/southbridge/intel/ibexpeak/thermal.c
@@ -19,7 +19,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include "pch.h"
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
static void thermal_init(struct device *dev)
diff --git a/src/southbridge/intel/ibexpeak/usb_ehci.c b/src/southbridge/intel/ibexpeak/usb_ehci.c
index b67a96a1e2..4eacd1b9aa 100644
--- a/src/southbridge/intel/ibexpeak/usb_ehci.c
+++ b/src/southbridge/intel/ibexpeak/usb_ehci.c
@@ -21,7 +21,7 @@
#include <device/pci_ids.h>
#include "pch.h"
#include <device/pci_ehci.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
static void usb_ehci_init(struct device *dev)
diff --git a/src/southbridge/intel/lynxpoint/azalia.c b/src/southbridge/intel/lynxpoint/azalia.c
index 38db1a47fc..5dd46b2ef5 100644
--- a/src/southbridge/intel/lynxpoint/azalia.c
+++ b/src/southbridge/intel/lynxpoint/azalia.c
@@ -20,7 +20,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <delay.h>
#include <device/azalia_device.h>
#include "pch.h"
diff --git a/src/southbridge/intel/lynxpoint/hda_verb.c b/src/southbridge/intel/lynxpoint/hda_verb.c
index 93a004eb79..1b3c695175 100644
--- a/src/southbridge/intel/lynxpoint/hda_verb.c
+++ b/src/southbridge/intel/lynxpoint/hda_verb.c
@@ -16,7 +16,7 @@
*/
#include <console/console.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <delay.h>
#include "pch.h"
#include "hda_verb.h"
diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c
index 08085afb58..450091c623 100644
--- a/src/southbridge/intel/lynxpoint/me_9.x.c
+++ b/src/southbridge/intel/lynxpoint/me_9.x.c
@@ -23,7 +23,7 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/lynxpoint/sata.c b/src/southbridge/intel/lynxpoint/sata.c
index aa18f4a59b..97b55e1d29 100644
--- a/src/southbridge/intel/lynxpoint/sata.c
+++ b/src/southbridge/intel/lynxpoint/sata.c
@@ -14,7 +14,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/lynxpoint/serialio.c b/src/southbridge/intel/lynxpoint/serialio.c
index 44c9a07882..5224f688ba 100644
--- a/src/southbridge/intel/lynxpoint/serialio.c
+++ b/src/southbridge/intel/lynxpoint/serialio.c
@@ -14,7 +14,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/southbridge/intel/lynxpoint/usb_ehci.c b/src/southbridge/intel/lynxpoint/usb_ehci.c
index 977dcfac40..b54e36b8f8 100644
--- a/src/southbridge/intel/lynxpoint/usb_ehci.c
+++ b/src/southbridge/intel/lynxpoint/usb_ehci.c
@@ -20,7 +20,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ehci.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include "pch.h"
diff --git a/src/southbridge/intel/lynxpoint/usb_xhci.c b/src/southbridge/intel/lynxpoint/usb_xhci.c
index 490740e730..ee25e5c409 100644
--- a/src/southbridge/intel/lynxpoint/usb_xhci.c
+++ b/src/southbridge/intel/lynxpoint/usb_xhci.c
@@ -19,6 +19,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include "pch.h"