diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-04-23 16:32:27 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-01 06:10:49 +0000 |
commit | 2d7173d462c66cbbca6a5354c1ac719941e117d9 (patch) | |
tree | 432c8fd4e65f30668e8e4f98d90a092a2a6fccd8 /src/southbridge/intel | |
parent | fdbdca2ec3a3a28142791cd331fcf42da59e9d38 (diff) | |
download | coreboot-2d7173d462c66cbbca6a5354c1ac719941e117d9.tar.xz |
src: Remove unused 'include <cpu/x86/cache.h>'
Change-Id: I2bf1eb87bb5476dd77b5a56dfe8846e82d414523
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40666
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r-- | src/southbridge/intel/bd82x6x/smihandler.c | 1 | ||||
-rw-r--r-- | src/southbridge/intel/common/pmutil.c | 1 | ||||
-rw-r--r-- | src/southbridge/intel/common/smi.c | 1 | ||||
-rw-r--r-- | src/southbridge/intel/i82801ix/smihandler.c | 1 | ||||
-rw-r--r-- | src/southbridge/intel/i82801jx/smihandler.c | 1 | ||||
-rw-r--r-- | src/southbridge/intel/ibexpeak/smihandler.c | 1 | ||||
-rw-r--r-- | src/southbridge/intel/lynxpoint/smi.c | 1 |
7 files changed, 0 insertions, 7 deletions
diff --git a/src/southbridge/intel/bd82x6x/smihandler.c b/src/southbridge/intel/bd82x6x/smihandler.c index 78ac08bf1c..b2b635fcbc 100644 --- a/src/southbridge/intel/bd82x6x/smihandler.c +++ b/src/southbridge/intel/bd82x6x/smihandler.c @@ -5,7 +5,6 @@ #include <arch/io.h> #include <device/pci_ops.h> #include <console/console.h> -#include <cpu/x86/cache.h> #include <device/pci_def.h> #include <cpu/x86/smm.h> #include <cpu/intel/em64t101_save_state.h> diff --git a/src/southbridge/intel/common/pmutil.c b/src/southbridge/intel/common/pmutil.c index 5de5d41b5d..a471eefcb8 100644 --- a/src/southbridge/intel/common/pmutil.c +++ b/src/southbridge/intel/common/pmutil.c @@ -3,7 +3,6 @@ #include <types.h> #include <console/console.h> -#include <cpu/x86/cache.h> #include <device/pci_def.h> #include <cpu/x86/smm.h> #include <southbridge/intel/common/pmbase.h> diff --git a/src/southbridge/intel/common/smi.c b/src/southbridge/intel/common/smi.c index 8f9544b892..f303ef4e93 100644 --- a/src/southbridge/intel/common/smi.c +++ b/src/southbridge/intel/common/smi.c @@ -6,7 +6,6 @@ #include <device/pci.h> #include <console/console.h> #include <arch/io.h> -#include <cpu/x86/cache.h> #include <cpu/x86/smm.h> #include <cpu/intel/smm_reloc.h> #include <southbridge/intel/common/pmbase.h> diff --git a/src/southbridge/intel/i82801ix/smihandler.c b/src/southbridge/intel/i82801ix/smihandler.c index 8a198487e8..928202103b 100644 --- a/src/southbridge/intel/i82801ix/smihandler.c +++ b/src/southbridge/intel/i82801ix/smihandler.c @@ -3,7 +3,6 @@ #include <types.h> #include <console/console.h> -#include <cpu/x86/cache.h> #include <cpu/x86/smm.h> #include <device/pci_def.h> #include <southbridge/intel/common/pmutil.h> diff --git a/src/southbridge/intel/i82801jx/smihandler.c b/src/southbridge/intel/i82801jx/smihandler.c index 5c1edbc307..de9148e9ae 100644 --- a/src/southbridge/intel/i82801jx/smihandler.c +++ b/src/southbridge/intel/i82801jx/smihandler.c @@ -3,7 +3,6 @@ #include <types.h> #include <console/console.h> -#include <cpu/x86/cache.h> #include <cpu/x86/smm.h> #include <device/pci_def.h> #include <southbridge/intel/common/pmutil.h> diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c index a7c1e5feaf..05cd20fd88 100644 --- a/src/southbridge/intel/ibexpeak/smihandler.c +++ b/src/southbridge/intel/ibexpeak/smihandler.c @@ -5,7 +5,6 @@ #include <arch/io.h> #include <device/pci_ops.h> #include <console/console.h> -#include <cpu/x86/cache.h> #include <device/pci_def.h> #include <cpu/x86/smm.h> #include <cpu/intel/em64t101_save_state.h> diff --git a/src/southbridge/intel/lynxpoint/smi.c b/src/southbridge/intel/lynxpoint/smi.c index 05b5bb5c43..4c8ccfa0d1 100644 --- a/src/southbridge/intel/lynxpoint/smi.c +++ b/src/southbridge/intel/lynxpoint/smi.c @@ -7,7 +7,6 @@ #include <console/console.h> #include <arch/io.h> #include <cpu/intel/smm_reloc.h> -#include <cpu/x86/cache.h> #include <cpu/x86/smm.h> #include "pch.h" |