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| author | Nina Wu <nina-cm.wu@mediatek.com> | 2021-04-27 17:32:41 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-05 11:46:08 +0000 |
| commit | c37d7b979f25332f8dec63cd70e7d8c39eef325d (patch) | |
| tree | 1f979860750a577e96dbc7359358f097210bd48b /src/southbridge/intel | |
| parent | ce38084db66858e9bdd787439d8156e6ec53fbfe (diff) | |
| download | coreboot-c37d7b979f25332f8dec63cd70e7d8c39eef325d.tar.xz | |
soc/mediatek/mt8192: devapc: update domain remap setting
Update domain remap setting to prevent DSP (domain 4)
from accessing registers.
Change-Id: Iefa9e75db85482a6c016b8b423c0b05f97e585b1
Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52705
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/southbridge/intel')
0 files changed, 0 insertions, 0 deletions