summaryrefslogtreecommitdiff
path: root/src/southbridge/intel
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2010-12-18 23:29:37 +0000
committerStefan Reinauer <stepan@openbios.org>2010-12-18 23:29:37 +0000
commitcadc54583877db65f33d2db11088d5fae1b77b74 (patch)
tree86377962deb6e6b1faa2093828ff7cb3e127120b /src/southbridge/intel
parent405721d45c8f7cd58c2466e43df8c2aee6f8e714 (diff)
downloadcoreboot-cadc54583877db65f33d2db11088d5fae1b77b74.tar.xz
SMM for AMD K8 Part 1/2
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6201 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx.h10
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c2
-rw-r--r--src/southbridge/intel/i82801gx/smi.c9
3 files changed, 14 insertions, 7 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index 37bcf572b9..208ff6d4af 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -38,18 +38,16 @@
#ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0
-#if !defined(ASSEMBLY)
+#if !defined(ASSEMBLY) && !defined(__ROMCC__)
#if !defined(__PRE_RAM__)
#include "chip.h"
extern void i82801gx_enable(device_t dev);
-#endif
-void i82801gx_enable_usbdebug(unsigned int port);
-#endif
-
-#if defined(__PRE_RAM__) && !defined(__ROMCC__) && !defined(ASSEMBLY)
+#else
void enable_smbus(void);
int smbus_read_byte(unsigned device, unsigned address);
#endif
+void i82801gx_enable_usbdebug(unsigned int port);
+#endif
#define MAINBOARD_POWER_OFF 0
#define MAINBOARD_POWER_ON 1
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index f486c1ebf8..7feb76a5fb 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -27,6 +27,7 @@
#include <pc80/i8259.h>
#include <arch/io.h>
#include <arch/ioapic.h>
+#include <cpu/cpu.h>
#include "i82801gx.h"
#define NMI_OFF 0
@@ -335,7 +336,6 @@ static void enable_clock_gating(void)
#if CONFIG_HAVE_SMI_HANDLER
static void i82801gx_lock_smm(struct device *dev)
{
- void smm_lock(void);
#if TEST_SMM_FLASH_LOCKDOWN
u8 reg8;
#endif
diff --git a/src/southbridge/intel/i82801gx/smi.c b/src/southbridge/intel/i82801gx/smi.c
index 39d5c4dca2..95ec1129a3 100644
--- a/src/southbridge/intel/i82801gx/smi.c
+++ b/src/southbridge/intel/i82801gx/smi.c
@@ -318,8 +318,17 @@ static void smm_relocate(void)
outb(0x00, 0xb2);
}
+static int smm_handler_copied = 0;
+
static void smm_install(void)
{
+ /* The first CPU running this gets to copy the SMM handler. But not all
+ * of them.
+ */
+ if (smm_handler_copied)
+ return;
+ smm_handler_copied = 1;
+
/* enable the SMM memory window */
pci_write_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), SMRAM,
D_OPEN | G_SMRAME | C_BASE_SEG);