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| author | Angel Pons <th3fanbus@gmail.com> | 2021-01-24 18:34:51 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-01 08:23:20 +0000 |
| commit | da43737c4ee04c282bbb31a42f21a094060dcc07 (patch) | |
| tree | 9ccca5c46f37ebe8480b2543c60f7b9051ef77c8 /src/southbridge/intel | |
| parent | 127455c4142db1329f2848414614d98d5539eb79 (diff) | |
| download | coreboot-da43737c4ee04c282bbb31a42f21a094060dcc07.tar.xz | |
nb/intel/sandybridge: Ensure tXP and tXPDLL do not overflow
The tXP bitfield is 3 bits wide, and the tXPDLL bitfield is 5 bits wide.
Clamp any values that would overflow this field. Bits in TC_DTP already
get set when the tXP and/or tXPDLL values are large.
Change-Id: Ie7f3e8e01ff7edd2652562080554c0afadde0bb9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49889
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
0 files changed, 0 insertions, 0 deletions