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| author | Vadim Bendebury <vbendeb@chromium.org> | 2014-08-29 16:00:37 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-23 15:35:12 +0100 |
| commit | fddf75e4afe6704c8f609a3f36860514ca0db8ed (patch) | |
| tree | 53d467c6e1115cd5eaba05da7f4fe207c41eb7e9 /src/southbridge/intel | |
| parent | 6ea3eff6b79d249122033457c7e2f7f8c61334f2 (diff) | |
| download | coreboot-fddf75e4afe6704c8f609a3f36860514ca0db8ed.tar.xz | |
build: mips: add default compilation options
MIPS targets should be compiled with no position independent code
allowed, as the generated image often does not support short range
components reference.
BUG=chrome-os-partner:31438
TEST=with the rest of the patches included MIPS board urara builds
successfully
Change-Id: I8ac2a2f6979d3b468159c9e29d07e022f48ab18a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e932b203db3e7cb510a7bf862d4538d55b6c7271
Original-Change-Id: I637dd44eb565447c18b2c3cdb022d0933c52fd20
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/215677
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8822
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
0 files changed, 0 insertions, 0 deletions