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authorVladimir Serbinenko <phcoder@gmail.com>2014-09-02 22:25:36 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-09-11 21:53:33 +0200
commit35c0f439fc2bc29817d643a7629a4d2b79d6b903 (patch)
tree1cb70aedcc75e29752a50fde10eca720c0e6f0ac /src/southbridge/intel
parent955ca5d948519e89573b1508bb85d3b01353ac60 (diff)
downloadcoreboot-35c0f439fc2bc29817d643a7629a4d2b79d6b903.tar.xz
Move nehalem/sandy/ivy to per-device acpi
Change-Id: I3d664ab575bf9c49a7bff9a395fbab96748430d0 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6802 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/bd82x6x/Kconfig1
-rw-r--r--src/southbridge/intel/bd82x6x/acpi/globalnvs.asl4
-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c31
-rw-r--r--src/southbridge/intel/bd82x6x/nvs.h1
-rw-r--r--src/southbridge/intel/ibexpeak/Kconfig1
-rw-r--r--src/southbridge/intel/ibexpeak/lpc.c31
-rw-r--r--src/southbridge/intel/ibexpeak/nvs.h1
7 files changed, 68 insertions, 2 deletions
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig
index 9cfa5d5b26..4b1931f32a 100644
--- a/src/southbridge/intel/bd82x6x/Kconfig
+++ b/src/southbridge/intel/bd82x6x/Kconfig
@@ -36,6 +36,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
select SPI_FLASH
+ select PER_DEVICE_ACPI_TABLES
config EHCI_BAR
hex
diff --git a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
index 99edc317cf..35094a6bb4 100644
--- a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
@@ -31,8 +31,8 @@ Name(\DSEN, 1) // Display Output Switching Enable
* we have to fix it up in coreboot's ACPI creation phase.
*/
-
-OperationRegion (GNVS, SystemMemory, 0xC0DEBABE, 0xf00)
+External(NVSA)
+OperationRegion (GNVS, SystemMemory, NVSA, 0xf00)
Field (GNVS, ByteAcc, NoLock, Preserve)
{
/* Miscellaneous */
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index fdfdffa26c..396b771e81 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -30,7 +30,11 @@
#include <arch/acpi.h>
#include <cpu/cpu.h>
#include <elog.h>
+#include <arch/acpigen.h>
+#include <drivers/intel/gma/i915.h>
+#include <cbmem.h>
#include "pch.h"
+#include "nvs.h"
#define NMI_OFF 0
@@ -663,6 +667,31 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
}
}
+static unsigned long southbridge_fill_ssdt(unsigned long current, const char *oem_table_id)
+{
+ global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
+ void *opregion;
+
+ /* Calling northbridge code as gnvs contains opregion address. */
+ opregion = igd_make_opregion();
+
+ if (gnvs) {
+ int scopelen;
+ acpi_create_gnvs(gnvs);
+ /* IGD OpRegion Base Address */
+ gnvs->aslb = (u32)opregion;
+ /* And tell SMI about it */
+ smm_setup_structures(gnvs, NULL, NULL);
+
+ /* Add it to SSDT. */
+ scopelen = acpigen_write_scope("\\");
+ scopelen += acpigen_write_name_dword("NVSA", (u32) gnvs);
+ acpigen_patch_len(scopelen - 1);
+ }
+
+ return (unsigned long) (acpigen_get_current());
+}
+
static struct pci_operations pci_ops = {
.set_subsystem = set_subsystem,
};
@@ -671,6 +700,8 @@ static struct device_operations device_ops = {
.read_resources = pch_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pch_lpc_enable_resources,
+ .write_acpi_tables = acpi_write_hpet,
+ .acpi_fill_ssdt_generator = southbridge_fill_ssdt,
.init = lpc_init,
.enable = pch_lpc_enable,
.scan_bus = scan_static_bus,
diff --git a/src/southbridge/intel/bd82x6x/nvs.h b/src/southbridge/intel/bd82x6x/nvs.h
index 1038f7369a..9cdfb1356a 100644
--- a/src/southbridge/intel/bd82x6x/nvs.h
+++ b/src/southbridge/intel/bd82x6x/nvs.h
@@ -158,3 +158,4 @@ typedef struct {
/* Used in SMM to find the ACPI GNVS address */
global_nvs_t *smm_get_gnvs(void);
#endif
+void acpi_create_gnvs(global_nvs_t *gnvs);
diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig
index c05fe43475..dfd8276f08 100644
--- a/src/southbridge/intel/ibexpeak/Kconfig
+++ b/src/southbridge/intel/ibexpeak/Kconfig
@@ -34,6 +34,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select SPI_FLASH
select SOUTHBRIDGE_INTEL_COMMON
select HAVE_USBDEBUG_OPTIONS
+ select PER_DEVICE_ACPI_TABLES
config EHCI_BAR
hex
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index a21176fcda..7580aa99fe 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -31,7 +31,11 @@
#include <arch/acpi.h>
#include <cpu/cpu.h>
#include <elog.h>
+#include <arch/acpigen.h>
+#include <drivers/intel/gma/i915.h>
+#include <cbmem.h>
#include "pch.h"
+#include "nvs.h"
#define NMI_OFF 0
@@ -660,6 +664,31 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
}
}
+static unsigned long southbridge_fill_ssdt(unsigned long current, const char *oem_table_id)
+{
+ global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
+ void *opregion;
+
+ /* Calling northbridge code as gnvs contains opregion address. */
+ opregion = igd_make_opregion();
+
+ if (gnvs) {
+ int scopelen;
+ acpi_create_gnvs(gnvs);
+ /* IGD OpRegion Base Address */
+ gnvs->aslb = (u32)opregion;
+ /* And tell SMI about it */
+ smm_setup_structures(gnvs, NULL, NULL);
+
+ /* Add it to SSDT. */
+ scopelen = acpigen_write_scope("\\");
+ scopelen += acpigen_write_name_dword("NVSA", (u32) gnvs);
+ acpigen_patch_len(scopelen - 1);
+ }
+
+ return (unsigned long) (acpigen_get_current());
+}
+
static struct pci_operations pci_ops = {
.set_subsystem = set_subsystem,
};
@@ -668,6 +697,8 @@ static struct device_operations device_ops = {
.read_resources = pch_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pch_lpc_enable_resources,
+ .acpi_fill_ssdt_generator = southbridge_fill_ssdt,
+ .write_acpi_tables = acpi_write_hpet,
.init = lpc_init,
.enable = pch_lpc_enable,
.scan_bus = scan_static_bus,
diff --git a/src/southbridge/intel/ibexpeak/nvs.h b/src/southbridge/intel/ibexpeak/nvs.h
index 1038f7369a..9cdfb1356a 100644
--- a/src/southbridge/intel/ibexpeak/nvs.h
+++ b/src/southbridge/intel/ibexpeak/nvs.h
@@ -158,3 +158,4 @@ typedef struct {
/* Used in SMM to find the ACPI GNVS address */
global_nvs_t *smm_get_gnvs(void);
#endif
+void acpi_create_gnvs(global_nvs_t *gnvs);