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authorEric Biederman <ebiederm@xmission.com>2004-10-27 08:53:57 +0000
committerEric Biederman <ebiederm@xmission.com>2004-10-27 08:53:57 +0000
commit6e53f50082cfac4ec2d06d2ff6515781190ad1c0 (patch)
treec352bf640df56343a303c5e5d04042ae2f90ebc8 /src/southbridge/intel
parent20fc678d65b4cdf6b24bdff45ef04933c538e2e8 (diff)
downloadcoreboot-6e53f50082cfac4ec2d06d2ff6515781190ad1c0.tar.xz
sizeram removal/conversion.
- mem.h and sizeram.h and all includes killed because the are no longer needed. - linuxbios_table.c updated to directly look at the device tree for occupied memory areas. - first very incomplete stab a converting the ppc code to work with the dynamic device tree - Ignore resources before we have read them from devices, (if the device is disabled ignore it's resources). - First stab at Pentium-M support - add part/init_timer.h making init_timer conditional until there is a better way of handling it. - Converted all of the x86 sizeram to northbridge set_resources functions. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1722 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82870/p64h2_pci_parity.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82870/p64h2_pci_parity.c b/src/southbridge/intel/i82870/p64h2_pci_parity.c
index d80f9213c9..fe27abf280 100644
--- a/src/southbridge/intel/i82870/p64h2_pci_parity.c
+++ b/src/southbridge/intel/i82870/p64h2_pci_parity.c
@@ -1,4 +1,3 @@
-#include <mem.h>
#include <pci.h>
#include <arch/io.h>
#include <printk.h>