diff options
| author | Torsten Duwe <duwe@lst.de> | 2007-11-05 22:35:01 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-11-05 22:35:01 +0000 |
| commit | c931625babcfacda301598f4eb0cea37d6e0e08c (patch) | |
| tree | 899bd30eb44e7a504abb996f919d443ac6599cfd /src/southbridge/intel | |
| parent | a358892e2cd6f57c0645dc95120fd253d75e20b7 (diff) | |
| download | coreboot-c931625babcfacda301598f4eb0cea37d6e0e08c.tar.xz | |
Fix the M57SLI routing table, as apparently set up from LinuxBIOS on
that board. Shift PCIe pin numbers downwards, and PCI int pins upwards.
This puts both PCI slots' int A and PCIe 16x int A into the right
position.
Signed-off-by: Torsten Duwe <duwe@lst.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel')
0 files changed, 0 insertions, 0 deletions