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authorArthur Heymans <arthur@aheymans.xyz>2019-06-16 23:36:28 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-10-16 14:08:29 +0000
commitd28d5071906e15c88939d889fbe40b117f5c303b (patch)
tree720d257987ba05695f2546b6fff0a180bde5b1b1 /src/southbridge/intel
parenta06689c7e7d88f74fd1d12f8f5055b5ea7bc741f (diff)
downloadcoreboot-d28d5071906e15c88939d889fbe40b117f5c303b.tar.xz
sb/intel/bd82x6x/lpc: Set up default LPC decode ranges
This sets up some common default LPC decode ranges in a common place. This may set up more decode ranges than needed but that typically does not hurt. Mainboards needing additional ranges can do so in the mainboard pch_enable_lpc hook. Change-Id: Ifeb5a862e56f415aa847d0118a33a31537ab8037 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33549 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/bd82x6x/early_pch.c21
1 files changed, 18 insertions, 3 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index 73fce3bf9f..df9fdefec1 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -254,8 +254,22 @@ static void pch_generic_setup(void)
write_pmbase16(TCO1_CNT, 1 << 11); /* halt timer */
}
-static void pch_enable_lpc_gen_decode(void)
+static void pch_enable_lpc_decode(void)
{
+ /*
+ * Enable some common LPC IO ranges:
+ * - 0x2e/0x2f, 0x4e/0x4f often SuperIO
+ * - 0x60/0x64, 0x62/0x66 often KBC/EC
+ * - 0x3f0-0x3f5/0x3f7 FDD
+ * - 0x378-0x37f and 0x778-0x77f LPT
+ * - 0x2f8-0x2ff COMB
+ * - 0x3f8-0x3ff COMA
+ */
+ pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010);
+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF2_LPC_EN | CNF1_LPC_EN
+ | MC_LPC_EN | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
+ | COMB_LPC_EN | COMA_LPC_EN);
+
const struct device *dev = pcidev_on_root(0x1f, 0);
const struct southbridge_intel_bd82x6x_config *config = NULL;
@@ -275,9 +289,10 @@ static void pch_enable_lpc_gen_decode(void)
void early_pch_init(void)
{
- pch_enable_lpc();
- pch_enable_lpc_gen_decode();
+ pch_enable_lpc_decode();
+
+ pch_enable_lpc();
pch_enable_bars();