diff options
author | Eric Biederman <ebiederm@xmission.com> | 2004-11-04 11:04:33 +0000 |
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committer | Eric Biederman <ebiederm@xmission.com> | 2004-11-04 11:04:33 +0000 |
commit | 018d8dd60f2cc0c82faac0ee2657daa163dd43e7 (patch) | |
tree | 528de120d262a9df05ce8b6119f593c85fa6b809 /src/southbridge/intel | |
parent | 4403f6082372d069e3cabe0918d9af5f9c1dccf6 (diff) | |
download | coreboot-018d8dd60f2cc0c82faac0ee2657daa163dd43e7.tar.xz |
- Update abuild.sh so it will rebuild successfull builds
- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
enabled. All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r-- | src/southbridge/intel/i82801dbm/i82801dbm.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801er/i82801er.c | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801dbm/i82801dbm.c b/src/southbridge/intel/i82801dbm/i82801dbm.c index ee9b60ab7f..29804dfbc5 100644 --- a/src/southbridge/intel/i82801dbm/i82801dbm.c +++ b/src/southbridge/intel/i82801dbm/i82801dbm.c @@ -51,6 +51,6 @@ void i82801dbm_enable(device_t dev) } struct chip_operations southbridge_intel_i82801dbm_control = { - .name = "Intel 82801dbm Southbridge", + CHIP_NAME("Intel 82801dbm Southbridge") .enable_dev = i82801dbm_enable, }; diff --git a/src/southbridge/intel/i82801er/i82801er.c b/src/southbridge/intel/i82801er/i82801er.c index c721a29983..79ad25e8b0 100644 --- a/src/southbridge/intel/i82801er/i82801er.c +++ b/src/southbridge/intel/i82801er/i82801er.c @@ -51,5 +51,6 @@ void i82801er_enable(device_t dev) } struct chip_operations southbridge_intel_i82801er_ops = { + CHIP_NAME("Intel 82801er Southbridge") .enable_dev = i82801er_enable, }; |