diff options
| author | Uwe Hermann <uwe@hermann-uwe.de> | 2009-08-28 13:42:24 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2009-08-28 13:42:24 +0000 |
| commit | 05c1e9c81c78a01c7b00fd63b7d2513f52a5d2fb (patch) | |
| tree | c94e94f5c6eb1abfdc2600face69673c6e696844 /src/southbridge/intel | |
| parent | 18c585b78a82c217ea32a8d529fde56b117630cc (diff) | |
| download | coreboot-05c1e9c81c78a01c7b00fd63b7d2513f52a5d2fb.tar.xz | |
Silence unneeded #warnings, change to code comments (trŅvial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4607 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/i82801xx/chip.h | 24 |
1 files changed, 15 insertions, 9 deletions
diff --git a/src/southbridge/intel/i82801xx/chip.h b/src/southbridge/intel/i82801xx/chip.h index d159aa2be0..443df451c3 100644 --- a/src/southbridge/intel/i82801xx/chip.h +++ b/src/southbridge/intel/i82801xx/chip.h @@ -18,14 +18,19 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef IGNORE_I82801XX_DEVICE_LIST -#warning "The i82801xx code currently supports, on a testing/experimental" -#warning "basis, these devices:" -#warning "i82801aa, i82801ab, i82801ba, i82801ca, i82801db, i82801dbm," -#warning "i82801eb, and i82801er." -#warning "Using this without modification on any other i82801 version will" -#warning "probably work until RAM init, but will fail after that." -#endif +/* + * The i82801xx code currently supports: + * - 82801AA + * - 82801AB + * - 82801BA + * - 82801CA + * - 82801DB + * - 82801DBM + * - 82801EB + * - 82801ER + * + * This code should NOT be used for ICH6 and later versions. + */ #ifndef SOUTHBRIDGE_INTEL_I82801XX_CHIP_H #define SOUTHBRIDGE_INTEL_I82801XX_CHIP_H @@ -43,10 +48,11 @@ struct southbridge_intel_i82801xx_config { uint8_t pirqf_routing; uint8_t pirqg_routing; uint8_t pirqh_routing; + uint8_t ide0_enable; uint8_t ide1_enable; }; extern struct chip_operations southbridge_intel_i82801xx_ops; -#endif /* SOUTHBRIDGE_INTEL_I82801XX_CHIP_H */ +#endif |