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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-05-13 13:38:38 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-23 05:20:25 +0000 |
| commit | 17c59f5da533eddef5e6bb85866b6d933e7fb767 (patch) | |
| tree | 2ed9e29d7d45779c00b689cf063d3b9506c94ee0 /src/southbridge/intel | |
| parent | 5af546c5e40835145fee6eff4f43283bea80db91 (diff) | |
| download | coreboot-17c59f5da533eddef5e6bb85866b6d933e7fb767.tar.xz | |
sb/intel/i82870: Get rid of device_t
Use of device_t has been abandoned in ramstage.
Change-Id: I751b72733de2e3bf3aebd1bc85dc83ec1c406faa
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26258
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/i82870/ioapic.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82870/pcibridge.c | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82870/ioapic.c b/src/southbridge/intel/i82870/ioapic.c index da7da5e8c6..6c653015e2 100644 --- a/src/southbridge/intel/i82870/ioapic.c +++ b/src/southbridge/intel/i82870/ioapic.c @@ -9,7 +9,7 @@ static int num_p64h2_ioapics = 0; -static void p64h2_ioapic_enable(device_t dev) +static void p64h2_ioapic_enable(struct device *dev) { /* We have to enable MEM and Bus Master for IOAPIC */ uint16_t command = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; @@ -26,7 +26,7 @@ static void p64h2_ioapic_enable(device_t dev) * @param dev PCI bus/device/function of P64H2 IOAPIC. * NOTE: There are two IOAPICs per P64H2, at D28:F0 and D30:F0. */ -static void p64h2_ioapic_init(device_t dev) +static void p64h2_ioapic_init(struct device *dev) { uint32_t memoryBase; int apic_index, apic_id; diff --git a/src/southbridge/intel/i82870/pcibridge.c b/src/southbridge/intel/i82870/pcibridge.c index e8d890ab95..01cdd14bbd 100644 --- a/src/southbridge/intel/i82870/pcibridge.c +++ b/src/southbridge/intel/i82870/pcibridge.c @@ -6,7 +6,7 @@ #include <pc80/mc146818rtc.h> #include "82870.h" -static void p64h2_pcix_init(device_t dev) +static void p64h2_pcix_init(struct device *dev) { u32 dword; u8 byte; |