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authorStefan Reinauer <stepan@coresystems.de>2010-01-16 16:35:38 +0000
committerStefan Reinauer <stepan@openbios.org>2010-01-16 16:35:38 +0000
commit67cd80299057d83790da235c4dc7286298dc6b16 (patch)
tree500a35f6c3d7290de60bd04618688b89398791c8 /src/southbridge/intel
parent42944c3989f27b14a66fa7c75a47c820c8d92119 (diff)
downloadcoreboot-67cd80299057d83790da235c4dc7286298dc6b16.tar.xz
* drop reset files from 945 mainboards (and use southbridge specific reset)
* drop debug.c files from 945 mainboards (and share it in the northbridge code) * adapt the mainboard and auto.c files for above changes. Rather trivial Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5016 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx_reset.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx_reset.c b/src/southbridge/intel/i82801gx/i82801gx_reset.c
index 1facb08105..35710125b2 100644
--- a/src/southbridge/intel/i82801gx/i82801gx_reset.c
+++ b/src/southbridge/intel/i82801gx/i82801gx_reset.c
@@ -20,8 +20,21 @@
#include <arch/io.h>
+void soft_reset(void)
+{
+ outb(0x04, 0xcf9);
+}
+
+#if 0
void hard_reset(void)
{
/* Try rebooting through port 0xcf9. */
outb((1 << 2) | (1 << 1), 0xcf9);
}
+#endif
+
+void hard_reset(void)
+{
+ outb(0x02, 0xcf9);
+ outb(0x06, 0xcf9);
+}