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authorElyes HAOUAS <ehaouas@noos.fr>2019-03-18 22:49:36 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-20 20:27:51 +0000
commita1e22b8192d5fc85995a41d0961c25293ba4391f (patch)
tree7b7dbc885d3ac99fe029cf0961eda1052e753dc1 /src/southbridge/intel
parent0eb4db185cfef44ddfdbd91d4fe69a48c127fa84 (diff)
downloadcoreboot-a1e22b8192d5fc85995a41d0961c25293ba4391f.tar.xz
src: Use 'include <string.h>' when appropriate
Drop 'include <string.h>' when it is not used and add it when it is missing. Also extra lines removed, or added just before local includes. Change-Id: Iccac4dbaa2dd4144fc347af36ecfc9747da3de20 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31966 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/bd82x6x/early_pch.c1
-rw-r--r--src/southbridge/intel/bd82x6x/elog.c1
-rw-r--r--src/southbridge/intel/common/gpio.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/gpio.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/romstage.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/spi.c2
-rw-r--r--src/southbridge/intel/i82371eb/acpi_tables.c1
-rw-r--r--src/southbridge/intel/ibexpeak/madt.c1
-rw-r--r--src/southbridge/intel/ibexpeak/smi.c1
-rw-r--r--src/southbridge/intel/lynxpoint/elog.c1
-rw-r--r--src/southbridge/intel/lynxpoint/lp_gpio.c1
-rw-r--r--src/southbridge/intel/lynxpoint/smi.c2
12 files changed, 2 insertions, 12 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index b5fbfbb071..23942feffb 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <string.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <arch/cbfs.h>
diff --git a/src/southbridge/intel/bd82x6x/elog.c b/src/southbridge/intel/bd82x6x/elog.c
index ef345efb75..e96c38da6b 100644
--- a/src/southbridge/intel/bd82x6x/elog.c
+++ b/src/southbridge/intel/bd82x6x/elog.c
@@ -19,7 +19,6 @@
#include <device/pci.h>
#include <device/pci_ops.h>
#include <stdint.h>
-#include <string.h>
#include <elog.h>
#include <southbridge/intel/common/pmutil.h>
#include "pch.h"
diff --git a/src/southbridge/intel/common/gpio.c b/src/southbridge/intel/common/gpio.c
index 1186058cc9..0245f4fc2d 100644
--- a/src/southbridge/intel/common/gpio.c
+++ b/src/southbridge/intel/common/gpio.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <string.h>
#include <arch/io.h>
#include <device/pci_ops.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/fsp_rangeley/gpio.c b/src/southbridge/intel/fsp_rangeley/gpio.c
index 831b1696c4..6db431cb16 100644
--- a/src/southbridge/intel/fsp_rangeley/gpio.c
+++ b/src/southbridge/intel/fsp_rangeley/gpio.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <string.h>
#include <arch/io.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c
index 2891ca4ae7..14611b3891 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.c
+++ b/src/southbridge/intel/fsp_rangeley/romstage.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <string.h>
#include <lib.h>
#include <timestamp.h>
#include <arch/io.h>
diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c
index e65576769c..afd89a7dba 100644
--- a/src/southbridge/intel/fsp_rangeley/spi.c
+++ b/src/southbridge/intel/fsp_rangeley/spi.c
@@ -14,9 +14,9 @@
*/
/* This file is derived from the flashrom project. */
+
#include <stdint.h>
#include <stdlib.h>
-#include <string.h>
#include <commonlib/helpers.h>
#include <delay.h>
#include <device/mmio.h>
diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c
index 7c6d3b4a2e..4b7dcf848f 100644
--- a/src/southbridge/intel/i82371eb/acpi_tables.c
+++ b/src/southbridge/intel/i82371eb/acpi_tables.c
@@ -16,7 +16,6 @@
*/
#include <console/console.h>
-#include <string.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <arch/smp/mpspec.h>
diff --git a/src/southbridge/intel/ibexpeak/madt.c b/src/southbridge/intel/ibexpeak/madt.c
index f7286bc9b9..3676a47b20 100644
--- a/src/southbridge/intel/ibexpeak/madt.c
+++ b/src/southbridge/intel/ibexpeak/madt.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <string.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <arch/smp/mpspec.h>
diff --git a/src/southbridge/intel/ibexpeak/smi.c b/src/southbridge/intel/ibexpeak/smi.c
index 7de8b3b995..4c9f2ac26d 100644
--- a/src/southbridge/intel/ibexpeak/smi.c
+++ b/src/southbridge/intel/ibexpeak/smi.c
@@ -23,7 +23,6 @@
#include <device/pci_ops.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
-#include <string.h>
#include <cpu/intel/smm/gen1/smi.h>
#include "pch.h"
diff --git a/src/southbridge/intel/lynxpoint/elog.c b/src/southbridge/intel/lynxpoint/elog.c
index e16e1be18a..6f12c70f61 100644
--- a/src/southbridge/intel/lynxpoint/elog.c
+++ b/src/southbridge/intel/lynxpoint/elog.c
@@ -19,7 +19,6 @@
#include <device/pci.h>
#include <device/pci_ops.h>
#include <stdint.h>
-#include <string.h>
#include <elog.h>
#include "pch.h"
diff --git a/src/southbridge/intel/lynxpoint/lp_gpio.c b/src/southbridge/intel/lynxpoint/lp_gpio.c
index 48e0be3aaf..e3d8f02805 100644
--- a/src/southbridge/intel/lynxpoint/lp_gpio.c
+++ b/src/southbridge/intel/lynxpoint/lp_gpio.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <string.h>
#include <arch/io.h>
#include <device/pci_ops.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/lynxpoint/smi.c b/src/southbridge/intel/lynxpoint/smi.c
index 426fb4233d..3a6c4038c8 100644
--- a/src/southbridge/intel/lynxpoint/smi.c
+++ b/src/southbridge/intel/lynxpoint/smi.c
@@ -21,7 +21,7 @@
#include <arch/io.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
-#include <string.h>
+
#include "pch.h"
void southbridge_smm_clear_state(void)